Executing Hardware Tasks on Dynamically Reconfigurable Devices Under Real-Time Conditions

Danne, Klaus; Mühlenbernd, Roland; Platzner, Marco

doi:10.1109/fpl.2006.311264

Cited by 27 publications

(17 citation statements)

References 5 publications

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“…In addition, they do not provide replacement support, and they follow a greedy list-scheduling approach that cannot escape from local-optimum decisions. In [16] the authors propose a scheduling methodology for a realtime system based on reconfigurable HW and implement it in a FPGA. They use an earliest-deadline first approach but grouping several tasks in order to apply efficiently full reconfigurations.…”

Section: Related Workmentioning

confidence: 99%

A Hardware Implementation of a Run-Time Scheduler for Reconfigurable Systems

Clemente

Resano

González

et al. 2011

IEEE Trans. VLSI Syst.

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Abstract-New generation embedded systems demand high performance, efficiency and flexibility. Reconfigurable hardware can provide all these features. However the costly reconfiguration process and the lack of management support have prevented a broader use of these resources. To solve these issues we have developed a scheduler that deals with task-graphs at run-time, steering its execution in the reconfigurable resources while carrying out both prefetch and replacement techniques that cooperate to hide most of the reconfiguration delays. In our scheduling environment task-graphs are analyzed at design-time to extract useful information. This information is used at run-time to obtain near-optimal schedules, escaping from local-optimum decisions, while only carrying out simple computations. Moreover, we have developed a hardware implementation of the scheduler that applies all the optimization techniques while introducing a delay of only a few clock cycles. In the experiments our scheduler clearly outperforms conventional run-time schedulers based on As-Soon-As-Possible techniques. In addition, our replacement policy, specially designed for reconfigurable systems, achieves almost optimal results both regarding reuse and performance.

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Section: Related Workmentioning

confidence: 99%

A Hardware Implementation of a Run-Time Scheduler for Reconfigurable Systems

Clemente

Resano

González

et al. 2011

IEEE Trans. VLSI Syst.

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“…That is why a DSP core has been chosen in the Ardoise project. However, a specific operating system, namely RHWOS, has several hardwareimplemented services as it is presented in [24]. Among other reasons, in image segmentation applications, DSP are more adapted to execute high-level algorithms although low-level processing can be done more efficiently by the reconfigurable area (cf.…”

Section: Implementation Examples On Ardoisementioning

confidence: 99%

Reconfigurable computing: design methodology and hardware tasks scheduling for real-time image processing

Kessal

Abel²,

Karabernou³

et al. 2008

J Real-Time Image Proc

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Technology evolution makes possible the integration of heterogeneous components as programmable elements (processors), hardware dedicated blocks, hierarchical memories and buses. Furthermore, an optimized reconfigurable logic core embedded within a System-onChip will associate the performances of dedicated architecture and the flexibility of programmable ones. In order to increase performances, some of the applications are carried out in hardware, using dynamically reconfigurable logic, rather than software, using programmable elements. This approach offers a suitable hardware support to design malleable systems able to adapt themselves to a specific application. This article makes a synthesis of the Ardoise project. The first objective of Ardoise project was to design and to produce a dynamically reconfigurable platform based on commercial FPGAs. The concept of dynamically reconfigurable architecture depends partially on new design methodologies elaboration as well as on the programming environment. The platform architecture was designed to be suitable for real-time image processing. The article outlines mainly the Ardoise tools aspect: development environment and real-time management of the hardware tasks. The proposed methodology is based on a dynamic management of tasks according to an application scenario written using C++ language.

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“…During the last years, much research in operating systems for reconfigurable hardware has been presented, including conceptual work, e.g., in [5], algorithms for task and resource management, e.g., in [6,7], and even sophisticated techniques such as relocation and preemption of hardware tasks, e.g., in [8]. In contrast to this research, we start out with an available RTOS and seek to integrate hardware cores into the system.…”

Section: Related Workmentioning

confidence: 99%

ReconOS: An RTOS Supporting Hard-and Software Threads

Lübbers

Planner

2007

2007 International Conference on Field Programmable Logic and Applications

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Modern platform FPGAs integrate fine-grained reconfigurable logic with processor cores and allow the creation of complete configurable systems-on-chip. However, design methodologies have not kept up with the rise in complexity of the target hardware. In particular, there is little overlap between the programming model for embedded software running on a real-time operating system and the programming model for digital logic.In this paper, we present the operating system ReconOS which supports both software and hardware threads with a single unified programming model. ReconOS is based on eCos, a widely-used real-time operating system (RTOS). We investigate the incurred time and area overheads, especially for inter-thread communication across the hardware/-software boundary, and present a case study demonstrating the feasibility of the RTOS-centric design approach.

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Executing Hardware Tasks on Dynamically Reconfigurable Devices Under Real-Time Conditions

Cited by 27 publications

References 5 publications

A Hardware Implementation of a Run-Time Scheduler for Reconfigurable Systems

A Hardware Implementation of a Run-Time Scheduler for Reconfigurable Systems

Reconfigurable computing: design methodology and hardware tasks scheduling for real-time image processing

ReconOS: An RTOS Supporting Hard-and Software Threads

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