Evaluation of Stability, Performance of Ultra-Low Voltage MOSFET, TFET, and Mixed TFET-MOSFET SRAM Cell With Write-Assist Circuits

Impact of TFET Unidirectionality and Ambipolarity on the Performance of 6T SRAM Cells

“…Therefore, modified SRAM architectures have been proposed to overcome the unidirectionality issue: asymmetric 6T cell with one I-AT and one O-AT and write-assist technique (WA) [9], 7T cell with O-ATs and one additional transistor for the read [10], 6T cell with p-type I-AT and read-assist (RA) [11], 8T and 10T Schmitt-Trigger cells [12], [13], a 7T driver-less (DL) cell [14] and a 8T hybrid TFET/CMOS cell [15].…”

“…As a result, the write and read operations are effectively decoupled leading to a robust solution to the unidirectional I D issue. The 8T cell has been employed in other works as a reference topology to benchmark more innovative schemes [14], [15].…”

“…Since the state of the cross-coupled inverters is not perturbed during the read, the RSNMs in the 8T cells correspond practically to the HSNMs of the corresponding 6T cells. Furthermore, the RSNMs of the 6T cells corresponds to the immunity margins of the (8T) half-selected cell [15].…”

“…In [15], where the proposed topology featured a much slower write delay than the 8T one, write assist techniques have been investigated in order to mitigate the gap. However, since in the 6T topology with pre-charge at V DD /2 the dynamic performance are comparable with the 8T cell, we believe that write assist techniques are not necessary.…”

“…We can conclude that the ambipolarity of such TFETs degrades the operation of the SRAM cells so severely that it prevents the storage operation. Although we have simulated only 6T cells, similar considerations apply also to other proposed SRAM topologies [9]- [15] that employ TFETs as ATs.…”