Eunomia

Wang, Xin; Zhang, Weihua; Wang, Zhaoguo; Wei, Ziyun; Chen, Haibo; Zhao, Wenyun

doi:10.1145/3018743.3018752

Cited by 12 publications

(2 citation statements)

References 30 publications

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“…The condition in the if statement (line 2) will fail, and the execution will enter the fallback path (line 8), which is essentially a critical section protected by htm_lock. In practice, as mentioned in previous work [19,70], htm_lock is typically a coarse-grained lock to simplify the multi-thread programming. This is one of the main reasons why existing DBT/DBI systems cannot achieve scalable performance with an increased number of threads.…”

Section: Background: Htm and Dbtmentioning

confidence: 99%

“…In this paper, we focus on hardware transactional memory (HTM), which has become a permanent part of many modern architectures, e.g., Intel's Haswell, Skylake, and IBM's POWER8 and zEnterprise EC12 (zEC12). As more and more applications are taking advantage of HTM [25,51,53,55,70,72,76], virtualizing HTM across ISAs becomes necessary when such applications are migrated across machines with different HTM implementations.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Efficient and scalable cross-ISA virtualization of hardware transactional memory

Wang

Yew

Zhai

et al. 2020

Proceedings of the 18th ACM/IEEE International Symposium on Code Generation and Optimization

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System virtualization is a key enabling technology. However, existing virtualization techniques suffer from a significant limitation due to their limited cross-ISA support for emerging architecture-specific hardware extensions. To address this issue, we make the first attempt at hardware transactional memory (HTM), which has been supported by modern multi-core processors and used by more and more applications to simplify concurrent programming. In particular, we propose an efficient and scalable mechanism to support cross-ISA virtualization of HTMs. The mechanism emulates guest HTMs using host HTMs, and tries to preserve as much as possible the performance and the scalability of guest applications. Experimental results on STAMP benchmarks show that an average of 2.3X and 12.6X performance speedup can be achieved respectively for x86_64 and PowerPC64 guest applications on an x86_64 host machine. Moreover, it can attain similar scalability to the native execution of the applications. CCS Concepts• Software and its engineering → Justin-time compilers; Runtime environments; Dynamic compilers; Virtual machines; Multithreading; • Hardware → Emerging languages and compilers.

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Section: Background: Htm and Dbtmentioning

confidence: 99%