Estimation of the Trap Energy Characteristics of Row Hammer-Affected Cells in Gamma-Irradiated DDR4 DRAM

Baeg, Sanghyeon; Yun, Donghyuk; Chun, Myungsun; Wen, Shi-Jie

doi:10.1109/tns.2022.3149487

Cited by 8 publications

(5 citation statements)

References 23 publications

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“…Reduction of SIBN layer thickness significantly increases Si-H bonding and hydrogen passivation, improving static retention characteristics due to the reduction of interface charge traps. 25) However, as the thickness of the SIBN layer becomes thinner and the MOB margin decreases, reliability problem 26) due to electrical short circuits are intensifying. To compensate for this problem, it is necessary to form MCs with a high aspect ratio, 27) but existing technologies have limitations.…”

Section: Discussionmentioning

confidence: 99%

A novel solution to improve static and dynamic retention characteristics by enhancing hydrogen passivation with in situ LD-TEOS/TEOS dual layer

Lee,

Jang,

Kim

et al. 2024

Jpn. J. Appl. Phys.

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We proposed a novel solution to improve both static and dynamic retention characteristics by additional etching of the thickness of SIBN, stopper when oxide etch, with in-situ dual low deposition-tetraethyl orthosilicate (LD-TEOS)/TEOS Dual layer. As DRAM Cells shrink, it is difficult to obtain reliable retention properties, so it becomes more significant to reduce the Number of Interface Trap (Nit) by hydrogen passivation. In this work, interface trap decreased by reducing the thickness of SIBN, which has low hydrogen diffusion coefficients, improve the static and dynamic retention characteristics simultaneously through enhancing hydrogen passivation with In-situ LD-TEOS Dual (ILD) layer compensating for Metal contact to Other Bit line pad distance (MOB) margin risk.

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Section: Discussionmentioning

confidence: 99%

A novel solution to improve static and dynamic retention characteristics by enhancing hydrogen passivation with in situ LD-TEOS/TEOS dual layer

Lee,

Jang,

Kim

et al. 2024

Jpn. J. Appl. Phys.

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“…Ionizing radiation is not only problematic for electronic devices that are intended for such missions or safety-critical applications but also for general semiconductor devices, in which daily radiation exposure has become a serious problem. , Presently, as the dimensions of electronic circuits are becoming ever smaller, with certain components becoming nano-scaled, faulty products may result from cosmic radiation during the air transportation with high altitudes . Row hammer faults in dynamic random access memory (DRAM) circuits or soft errors occurring in computers and smartphones even on the earth’s surface are regarded to originate from cosmic radiation …”

Section: Introductionmentioning

confidence: 99%

“…11 Row hammer faults in dynamic random access memory (DRAM) circuits or soft errors occurring in computers and smartphones even on the earth's surface are regarded to originate from cosmic radiation. 12 Therefore, for several applications, it is crucial that semiconductor devices exhibit high operational stability during ionizing radiation. However, conventional silicon-based metaloxide-semiconductor field-effect transistor (MOSFET) devices exhibit significant performance degradation due to radiation damage of the constituent materials and interfaces.…”

Section: Introductionmentioning

confidence: 99%

In Situ Radiation Hardness Study of Amorphous Zn–In–Sn–O Thin-Film Transistors with Structural Plasticity and Defect Tolerance

Choi

Kang

et al. 2023

ACS Appl. Mater. Interfaces

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Solution-processed metal-oxide thin-film transistors (TFTs) with different metal compositions are investigated for ex situ and in situ radiation hardness experiments against ionizing radiation exposure. The synergetic combination of structural plasticity of Zn, defect tolerance of Sn, and high electron mobility of In identifies amorphous zinc−indium−tin oxide (Zn−In−Sn−O or ZITO) as an optimal radiation-resistant channel layer of TFTs. The ZITO with an elemental blending ratio of 4:1:1 for Zn/In/Sn exhibits superior ex situ radiation resistance compared to In−Ga− Zn−O, Ga−Sn−O, Ga−In−Sn−O, and Ga−Sn−Zn−O. Based on the in situ irradiation results, where a negative threshold voltage shifts and a mobility increase as well as both off current and leakage current increase are observed, three factors are proposed for the degradation mechanisms: (i) increase of channel conductivity, (ii) interface-trapped and dielectric-trapped charge buildup, and (iii) trap-assisted tunneling in the dielectric. Finally, in situ radiation-hard oxide-based TFTs are demonstrated by employing a radiationresistant ZITO channel, a thin dielectric (50 nm SiO 2 ), and a passivation layer (PCBM for ambient exposure), which exhibit excellent stability with an electron mobility of ∼10 cm 2 /V s and aΔV th of <3 V under real-time (15 kGy/h) gamma-ray irradiation in an ambient atmosphere.

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“…To prevent data loss, the JEDEC standard mandates a periodic refresh of DRAM every 64 ms [4]. Nevertheless, when a DRAM is exposed to a radiation environment, it may encounter a single-event upset (SEU) phenomenon, which leads to transient bit flips [5,6], or exhibit total ionizing dose (TID) effects, which reduce the retention time to less than 64 ms [7][8][9][10][11][12].…”

Section: Introductionmentioning

confidence: 99%

“…This paper compared the variable retention time (VRT) related to the capacity of DRAM and verified that radiationinduced VRT can induce intermittently stuck bits (ISBs) and cause bit errors [8]. The row hammer effects of the TID on the timing parameters were analyzed, and the activation energy of the interface trap was extracted [7]. Although these studies are valuable because they provide an insightful analysis of the impact of TID on DRAM, they are limited because they study only unbiased states.…”

Section: Introductionmentioning

confidence: 99%

Investigation Into the Degradation of DDR4 DRAM Owing to Total Ionizing Dose Effects

Lee,

Suh,

Ryu

et al. 2023

IEEE Access

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Total ionizing dose (TID) effects of gamma rays were investigated on DDR4 dynamic random access memory (DRAM) and analyzed using TCAD simulations. In this study, we considered the operating states, dose rates, temperatures, and annealing to analyze the impact of TID under different conditions. The worst degradation was observed in the operated state and at a low-dose rate because of the absence of an electrostatic barrier that reduced the possibility of interface trap formation under unbiased and high-dose rate conditions. At lower temperatures, the effects of radiation were mitigated by the reduced production of protons (H + ). In addition, the unbiased DRAM and high-temperature conditions are the fastest to recover during postirradiation annealing. In TCAD simulations, the retention time decreased with increasing temperature because the band-to-band tunneling (BTBT) generation increased. Furthermore, the retention time and row activation latency (tRCD) degraded as the concentration of the interface traps increased. This is because the interface traps caused leakage currents and hindered the flow of electrons.

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Estimation of the Trap Energy Characteristics of Row Hammer-Affected Cells in Gamma-Irradiated DDR4 DRAM

Cited by 8 publications

References 23 publications

A novel solution to improve static and dynamic retention characteristics by enhancing hydrogen passivation with in situ LD-TEOS/TEOS dual layer

A novel solution to improve static and dynamic retention characteristics by enhancing hydrogen passivation with in situ LD-TEOS/TEOS dual layer

In Situ Radiation Hardness Study of Amorphous Zn–In–Sn–O Thin-Film Transistors with Structural Plasticity and Defect Tolerance

Investigation Into the Degradation of DDR4 DRAM Owing to Total Ionizing Dose Effects

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