Error control coding for semiconductor memory systems in the space radiation environment

Abstract

Error control coding is essential for semiconductor memory systems used in the space radiation environment because memory chips in this environment often suffer from single event upsets (SEUs). This paper presents the development of encoders and decoders of error control codes suitable for the space radiation environment. To select suitable error control codes, we analyze error patterns and error counts in in-flight data of a solid state recorder installed in the Mission Demonstration test Satellite-1 (MDS-1). Based on this analysis, six classes of linear error control codes are selected, and encoders and decoders of these codes are designed and implemented using an FPGA. To reduce the decoding delay, the decoders are designed based on a parallel decoding method. Evaluation of the implemented FPGA shows that the decoders have 45K to 300K gates with decoding delay of about 20 ns.

Low-Density Parity Check Codes

“…Typically λ and λ e are in the range of 10 −7 to 10 −8 in space [50,62,73]. For λ = λ e = 10 −7 , the results in Figure 7.1 correspond to the case of T s = 10 4 hours.…”

“…al [50] made measurements to characterize memory failure events in a radiation environment. Recently, MacLeod et.…”

“…In literature, many conventional memory models assume that bit errors are independent. However, multibit errors were reported in satellite experiments [50]. Moreover, memory feature sizes are shrinking and multiple-bit-per-cell structures are becoming standard so radiation will increasingly lead to multibit errors.…”

Internet Protocol Based Satellite On-Board System

“…ECC is used in a data transmission system which has noise and error [16]. ECC checks every bit of data transmitted in the network.…”