Error Bounded Exact BDD Minimization in Approximate Computing

Froehlich, Saman; Grobe, Daniel; Drechsler, Rolf

doi:10.1109/ismvl.2017.11

Cited by 7 publications

(5 citation statements)

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Some notable efforts in inexact circuit research focus on manually designing specific arithmetic units, such as adders [11] or multipliers [12], [13], while others adopt a more generic approach, enabling the simplification of any combinatorial circuit [2], [3], [4], [7], [14], [15], [16]. A wide variety of techniques belong to this category, including methods exploiting BDDs [17], [18] or and-inverter graphs [19], as well as combining together approximate units to realise more complex systems [20], [21], [22].…”

Section: Motivationmentioning

confidence: 99%

A Formal Framework for Maximum Error Estimation in Approximate Logic Synthesis

Scarabottolo

Ansaloni

Constantinides

et al. 2022

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

Approximate Logic Synthesis techniques have become popular in error-resilient systems, where accuracy requirements can be traded for improved energy efficiency. Many of these techniques operate on a circuit by substituting or removing some of its portions under a predefined error constraint; however, research on systematic methods to determine the error induced by such transformations is still at an early stage. We propose herein a generic framework for modeling maximum error in a circuit, called Partition and Propagate, which is a fundamental preliminary step for ALS. This framework is based on circuit partitioning and error propagation among the sub-circuits. We provide a sound, complete formal description of such framework, and we illustrate how two state-of-the-art algorithms can be subsumed by it. Moreover, we propose a novel gate-level errormodeling algorithm which is able to identify the whole range of possible errors induced by a given approximate transformation. We compare the three strategies and illustrate the efficiency of the new error-propagation methodology, which is able to identify accurate error bounds and, hence, guide ALS techniques to more valuable solutions.

show abstract

Section: Motivationmentioning

confidence: 99%

A Formal Framework for Maximum Error Estimation in Approximate Logic Synthesis

Scarabottolo

Ansaloni

Constantinides

et al. 2022

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

show abstract

“…The idea behind rounding is that a node or its descendants are replaced by a terminal node depending upon the size of its ON-Set (number of assignments for which a Boolean function evaluate to true). Froehlich et al have explored the problem of finding the smallest BDD for singleoutput functions [6]. Recently, Wendler et al have used a bucket-based greedy search for BDD approximation.…”

Section: Related Workmentioning

confidence: 99%

An Adaptive Metric for Node Substitution-Based BDD Minimization

Hassen

Khan

2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

View full text Add to dashboard Cite

Modern computing workloads are becoming increasingly demanding and data-intensive. ASIC implementations designed for such computing workloads can consume valuable resources in terms of device size and system cost. Approximate Computing helps in preserving such resources in the case of applications that are error tolerant. We propose an Approximate Computing method that uses an adaptive heuristic to reduce the size of Reduced Ordered Binary Decision Diagrams through node substitutions. We establish the efficacy of our technique by showing improvement over a range of ISCAS-89 benchmarks.

show abstract

“…The general idea of BDD-based approximate synthesis approaches is to first represent an input circuit as a BDD, and then transform it to produce an approximate BDD with reduced size. The approximate BDD is accepted and synthesized to a circuit as long as the error between the original BDD and approximate BDD does not exceed a given error bound [13], [51]. One possible transformation is to replace a node with one of its children, i.e., co-factors.…”

Section: B Logic Rewriting Using Boolean Matrix Factorizationmentioning

confidence: 99%

“…The aforementioned approach does not guarantee minimum BDD size for a target error bound. It is possible to devise a method to identify the minimum BDD for a given error bound, where the output of this function differs in at most e possible input combinations from the original circuit [13]. To identify this function a new BDD, g, is constructed such that it enumerates every possible function whose output differs in at most e bits compared to the original circuit.…”

Section: B Logic Rewriting Using Boolean Matrix Factorizationmentioning

confidence: 99%

See 1 more Smart Citation

Approximate Logic Synthesis: A Survey

et al. 2020

View full text Add to dashboard Cite

Approximate computing is an emerging paradigm that, by relaxing the requirement for full accuracy, offers benefits in terms of design area and power consumption. This paradigm is particularly attractive in applications where the underlying computation has inherent resilience to small errors. Such applications are abundant in many domains, including machine learning, computer vision and signal processing. In circuit design, a major challenge is the capability to synthesize approximate circuits automatically, without manually relying on the expertise of designers. In this work, we review methods devised to synthesize approximate circuits given their exact functionality and an approximability threshold. We summarize strategies for evaluating the error that circuit simplification can induce on the output, which guide synthesis techniques in choosing the circuit transformations that lead to the largest benefit for a given amount of induced error. We then review circuit simplification methods that operate at gate or Boolean level, including those that leverage classical Boolean synthesis techniques to realize the approximations. We also summarize strategies that take highlevel descriptions such as C or behavioral Verilog and synthesize approximate circuits from these descriptions.

show abstract

Error Bounded Exact BDD Minimization in Approximate Computing

Cited by 7 publications

References 19 publications

A Formal Framework for Maximum Error Estimation in Approximate Logic Synthesis

A Formal Framework for Maximum Error Estimation in Approximate Logic Synthesis

An Adaptive Metric for Node Substitution-Based BDD Minimization

Approximate Logic Synthesis: A Survey

Contact Info

Product

Resources

About