Erratum: “Robustness of ultrathin aluminum oxide dielectrics on Si(001)” [Appl. Phys. Lett. <b>78</b>, 2670 (2001)]

Copel, M.; Cartier, E.; Gusev, Evgeni; Guha, S.; Bojarczuk, N. A.; Poppeller, M.

doi:10.1063/1.1380681

Cited by 6 publications

(6 citation statements)

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“…• C. 19 It's interesting to note that at this temperature, blistering appears in our annealing condition. One possible scenario would be a causal connection between silicon oxidation and blistering generation.…”

Section: Resultsmentioning

confidence: 99%

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Direct Bonding Mechanism of ALD-Al₂O₃Thin Films

Beche

Fournel

Larrey

et al. 2015

ECS J. Solid State Sci. Technol.

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Direct bonding mechanism of amorphous ALD alumina has been investigated from room temperature up to 1200 • C. By considering the evolution with temperature of free alumina surfaces and bonded configuration we highlight strong interaction between oxidant species and defect generation through interfacial oxidation. In the first case, the combination of internal stress and adhesion loss by dry O 2 oxidation results in blister formations, whereas in the case of bonding structures, wet oxidation with H 2 production at Silicon-Alumina interfaces explains void formation. Based on these established mechanisms we provide insights on alumina layer integration within a large temperature range. © The Author Direct bonding is used to join two mirror-polished wafers without any additional material. This technique has proven to be a powerful assembly strategy and found extensive application in microelectronics, MEMS and optoelectronic device fabrication. In particular, direct bonding has enabled the emergence of Silicon-On-Insulator (SOI) based technologies. For many reasons including processing convenience, good electrical and thermo-mechanical behavior, SiO 2 appeared from the beginning as an ideal candidate as buried insulating material and also for as bonding material. SiO 2 SOI structures promote many advantages such as the improvement of device switching speed and power consumption or even parasitic capacitance. Recently, with device scale reduction, SiO 2 material has shown some limitations such as notable leakage current or self-heating that affects next generation devices. In this context, one possible alternative would be the replacement of SiO 2 by a better candidate.1-3 The consideration of the comprise between thermal and electrical properties has already pointed out different materials such as diamond, Al 2 O 3 , HfO 2 or Si 3 N 4 .1 Among these materials, alumina thin film appears as a credible candidate replacement of buried SiO 2 with suitable electrical (ρ = 10 12 -10 14 .cm) and thermal (thermal conductivity = 0.3-30 W.m −1 .K −1 ) properties. In addition, bonding feasibility was already demonstrated in the past. [4][5][6][7] Recently with the emergence of III-V-OI substrates at low bonding temperature, ALD-Al 2 O 3 thin film found new outlooks. Indeed the improvement of interface quality between III-V substrates and ALD-Al 2 O 3 layers in comparison with SiO 2 layer (lower interface roughness) results in better performance in specific configuration. 8,9 Moreover, direct wafer bonding using the high-k dielectric material provides a better mechanical assembly, much stronger than deposited SiO 2 within the low temperature range.10,11 Nevertheless recent works pointed out numerous defect generations at higher thermal required for other devices and integration scheme typically T ≤ 600• C. 12,13 The defect apparition, and resulting debonding, alters its fabrication and its performance. In this paper we focus on these defects within a wide temperature range [RT to 1200• C]. We conduct a comparative analysis betwee...

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Section: Resultsmentioning

confidence: 99%

“…18 It is also known that SiO 2 growth at deposition interface can be observed during annealing. 19,20 Indeed, Copel et al have observed that a growth of interfacial SiO 2 layers takes place during low-pressure oxidation at 600…”

Section: Resultsmentioning

confidence: 99%

Direct Bonding Mechanism of ALD-Al₂O₃Thin Films

Beche

Fournel

Larrey

et al. 2015

ECS J. Solid State Sci. Technol.

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“…9) Fourth, the Al 2 O 3 /Si system was not stable at an ambient of 1000 C: severe intermixing has been observed in previous research. 22) Figure 14 demonstrates the AES depth profiles for the Al, O, N and Si elements. Clearly, the interdiffusion between the Al 2 O 3 IPD and the underlying Poly-I became more notable when annealed at 1000 C. The existence of these Al-Si-O mixtures may act as positive fixed charge centers 23) and facilitate the trapping of electrons.…”

Section: Effects Of Pda Temperaturementioning

confidence: 99%

Characteristics of the Inter-Poly Al₂O₃ Dielectrics on NH₃-Nitrided Bottom Poly-Si for Next-Generation Flash Memories

Chen

Chien

Lou

2005

Jpn. J. Appl. Phys.

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We consider the polarization of unstable type-IIB D0-branes in the presence of a background five-form field strength. This phenomenon is studied from the point of view of the leading terms in the non-abelian Born Infeld action of the unstable D0-branes. The equations have SO(4) invariant solutions describing a non-commutative 3-sphere, which becomes a classical 3-sphere in the large-N limit. We discuss the interpretation of these solutions as spherical D3-branes. The tachyon plays a tantalizingly geometrical role in relating the fuzzy S 3 geometry to that of a fuzzy S 4 .

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“…It is believed to be due to the penetration of B from the poly-Si gate to the channel because there is little change of swing in the nMOSFET. Charge pumping measurements indicate the occurrence of defect generation and/or interfacial roughening during reduction of the SiO 2 [3] and Al-silicate formation in case of low temperature PDA, which results in degradation of the mobility (Fig. 7).…”

Section: Pda Temperature Dependence: Interface Instabilitymentioning

confidence: 99%

Thermal Instability of Poly-Si Gate Al₂O₃ MOSFETs

Kim¹,

Kawahara²,

Itoh³

et al. 2004

Jpn. J. Appl. Phys.

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The thermal stability of a SiO2/Al2O3 dielectric stack under high-temperature annealing after poly-Si gate deposition was examined. An interface reaction occurs when the activation temperature is higher than the post deposition annealing temperature, which results in the reduction of the interfacial oxide layer and hence silicate formation. As a result, the characteristics of metal oxide semiconductor field effect transistors (MOSFETs), such as mobility, reliability, and the distribution of capacitance are severely degraded. The formation of a SiON interfacial layer is found to be effective in suppressing the interface reaction.

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Erratum: “Robustness of ultrathin aluminum oxide dielectrics on Si(001)” [Appl. Phys. Lett. 78, 2670 (2001)]

Cited by 6 publications

References 0 publications

Direct Bonding Mechanism of ALD-Al₂O₃Thin Films

Direct Bonding Mechanism of ALD-Al₂O₃Thin Films

Characteristics of the Inter-Poly Al₂O₃ Dielectrics on NH₃-Nitrided Bottom Poly-Si for Next-Generation Flash Memories

Thermal Instability of Poly-Si Gate Al₂O₃ MOSFETs

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Erratum: “Robustness of ultrathin aluminum oxide dielectrics on Si(001)” [Appl. Phys. Lett. 78, 2670 (2001)]

Cited by 6 publications

References 0 publications

Direct Bonding Mechanism of ALD-Al2O3Thin Films

Direct Bonding Mechanism of ALD-Al2O3Thin Films

Characteristics of the Inter-Poly Al2O3 Dielectrics on NH3-Nitrided Bottom Poly-Si for Next-Generation Flash Memories

Thermal Instability of Poly-Si Gate Al2O3 MOSFETs

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Direct Bonding Mechanism of ALD-Al₂O₃Thin Films

Direct Bonding Mechanism of ALD-Al₂O₃Thin Films

Characteristics of the Inter-Poly Al₂O₃ Dielectrics on NH₃-Nitrided Bottom Poly-Si for Next-Generation Flash Memories

Thermal Instability of Poly-Si Gate Al₂O₃ MOSFETs