Epoxy encapsulation on Ceramic Quad Flat Packs

Carden, T.; Clementi, J.; Engle, S.

doi:10.1109/ectc.1994.367617

Cited by 7 publications

(3 citation statements)

References 7 publications

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“…Carden et al [8] performed shock and vibration testing on a ceramic quad flat pack (CQFP). Their work also was mainly focused on the interconnect reliability.…”

Section: Bilitymentioning

confidence: 99%

Investigation of heat sink attach methodologies and the effects on package structural integrity and interconnect reliability of the 119-lead plastic ball grid array

Eyman

Kromann

1997 Proceedings 47th Electronic Components and Technology Conference

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An experimental study was performed to investigate various heat sinks and attach methods commercially available for the high-performance 1 19-lead plastic ball grid array (PBGA) package. Attach methods investigated in this study include a pressure-sensitive adhesive, mechanical clips, and thermally conductive adhesives. This work will show the effects of heat sink attach methods on the package structural integrity and solder ball interconnect reliability. This work is necessary to better provide total solutions for customers who will need to dissipate high levels of power from this package.The heat sinks were attached to the 119-lead PBGA packages which were mounted on multi-layer printed-circuit boards. These assemblies were then subjected to accelerated-life testing (ALT) using air-to-air thermal cycling between 0 "C and 100 "C to determine the effect of attaching heat sinks to the packages on the electrical reliability of the solder joint connection. Besides interconnect reliability, ALT was used to determine the effect of thermal cycling on the reliability of the heat sink attach mechanism. The heat sink attach mechanisms were tested by three different methods. The first was to simply observe the heat sinks to see if they fall off during thermal cycling. Mechanical shock tests then were performed using a package drop tester. Samples that underwent 1 OOO, 2 OOO, and 11 400 thermal cycles, as well as no thermal cycling, were subjected to this test. Finally, shear strength tests using a constant strain-rate mechanical testing machine were performed on the packages with heat sinks attached using adhesives.Several modes of failure appeared in the experiments. These failures included extremely low interconnect life in thermal cycling, heat sink detachment during drop tests and during thermal cycling, and low adhesion strength in shear tests. While some attachment methods were obviously not suitable, others provided robust solutions to the heat sink attachment problem.

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“…Carden et al [8] performed shock and vibration testing on a ceramic quad flat pack (CQFP). Their work also was mainly focused on the interconnect reliability.…”

Section: Bilitymentioning

confidence: 99%

Investigation of heat sink attach methodologies and the effects on package structural integrity and interconnect reliability of the 119-lead plastic ball grid array

Eyman

Kromann

1997 Proceedings 47th Electronic Components and Technology Conference

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“…Also, the epoxy encapsulant technology used to improve C4 life was further extended. It provides enhanced reliability in the lead to substrate solder connection using a slightly different epoxy material 8,9…”

Section: Introductionmentioning

confidence: 99%

Assembly and Reliability of Very Large Flip‐chip on CQFP

Clementi¹,

Dearing

Bergeron

1996

Microelectronics International

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The IBM ceramic quad flat pack (CQFP) is a high performance, low‐cost chip carrier for surface mount assembly. It is an extension of metallised ceramic (MC) and metallised ceramic with polyimide (MCP) product technologies. These finished modules conform to JEDEC I/O and footprint standards. They are available in 0.5 mm and 0.4 mm lead pitches with flexibility to address unique application requirements such as body sizes or lead pitches. Connection from integrated circuit (IC) to carrier is performed using flip‐chip (C4 ‐ Controlled Collapse Chip Connection) attach. Silicon die size and the quantity of C4 connections for flip‐chip joining have historically been constrained to reduce early life failures caused by solder fatigue wearout. This DNP (distance from neutral point of chip footprint) limitation has been overcome with increasing usage of epoxy encapsulation as a flip‐chip underfill. The encapsulant matches the coefficient of thermal expansion (CTE) of C4 solder and minimises stresses on the interconnection. This enhancement provides a substantial reliability improvement in comparison with unencapsulated packages. Also, it enables larger die with smaller C4 solder bumps on finer pitches to be assembled on ceramic carriers. Recent product development and testing have extended flip‐chip on ceramic packaging technology even further than previously anticipated. Test die up to 20 mm in size with over 2,000 C4 joints have been successfully assembled, encapsulated, stress tested and qualified in CQEP modules. Flip‐chip assembly and encapsulation of C4 connections on very large die to CQFP components have been implemented into IBM manufacturing production. This large‐scale packaging enhancement continues to demonstrate that flip‐chip underfill eliminates the intrinsic failure mechanisms associated with fatigue wearout. This provides a significant technology extension to this low‐cost and high reliability product offering.

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“…Schematic drawings of this package are shown in Figures 1 and 2 [7]. The stress conditions that were imposed for this qualification are shown in Table 1.…”

Section: Resultsmentioning

confidence: 99%

UV curable urethane encapsulant for ceramic chip carriers

Wilson¹

1994 Proceedings. 44th Electronic Components and Technology Conference

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A new acrylated urethane encapsulant has been formulated for use on ceramic chip carriers. This encapsulant has been implemented on pin grid array (PGA) ceramic carriers and on peripheral leaded surface mount (SMT) ceramic carriers for IBM's C4 chips. The encapsulant is a UV curable material and is used to cover the thin film circuitry on the ceramic carrier. The encapsulant offers a low cost alternative to the metal caps that were used on the pin grid array ceramic carriers or to the ceramic cap that was used on the peripheral leaded surface mount carrier.UV curing was chosen as the preferred curing process in order to improve the manufacturing process flow. Many thermally cured materials are used in chip packaging. This thermal curing usually means racking of parts and curing for several hours. As the number of thermally cured materials increases so does the number of different cure temperaturedtime profiles. This drives the need for more and more ovens and increases the risk of improper cure if the wrong oven is used.Many encapsulants were evaluated in an gffort to find materials that would not crack or delaminate during

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Epoxy encapsulation on Ceramic Quad Flat Packs

Cited by 7 publications

References 7 publications

Investigation of heat sink attach methodologies and the effects on package structural integrity and interconnect reliability of the 119-lead plastic ball grid array

Investigation of heat sink attach methodologies and the effects on package structural integrity and interconnect reliability of the 119-lead plastic ball grid array

Assembly and Reliability of Very Large Flip‐chip on CQFP

UV curable urethane encapsulant for ceramic chip carriers

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