Enhancing I2C robustness to soft errors

Carvalho, Vicente; Kastensmidt, Fernanda Lima

doi:10.1109/lascas.2017.7948049

Cited by 4 publications

(5 citation statements)

References 2 publications

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“…Inter-Integrated Circuit (I2C) is a data bus used to handle data transmissions between peripherals, originally designed for short distance communications within a single device. The I2C bus has gained its popularity due to its simplicity and low cost [3]. The I2C bus allows communication between low-speed peripheral ICs to processors and microcontrollers in short distances [2], enabling a variety of different topologies such as single master to single/multi slaves or multi masters to multi slaves.…”

Section: A Overview Of the Busmentioning

confidence: 99%

“…The simplicity of the I2C bus makes it susceptible to faults and failures especially when implemented without shielding in the harsh space environment as it is vulnerable to failures due to exposure to radiation. Radiation plays a role is causing bitflips on the I2C bus and I2C devices, which can lead to corruption in the operating system, program, or microcontroller pointer, eventually leading to bus lockups [3,7]. Bus lockup is the state where the I2C master loses its connectivity with all slaves and the data transmission on the bus is blocked.…”

Section: A Overview Of the Busmentioning

confidence: 99%

“…Bus lockup is the state where the I2C master loses its connectivity with all slaves and the data transmission on the bus is blocked. Bus lockups are very common I2C failure and occur mainly due to the simplicity of the bus design especially for not implementing any data integrity check nor failure recovery [3], making it a single point of failure to CubeSat missions [7]. Additionally, transient faults that occur in the I2C cores such as a bitflip in registers, and missing acknowledgements can lead to bus lockups as well.…”

Section: A Overview Of the Busmentioning

confidence: 99%

“…The monitor's implementation allows checking the success of the data transactions by calculating the checksum of the data transmitted or detecting NACK signal on the bus. Additionally, allowing fault recovery by forcing the I2C master to reset [3].…”

Section: Related Workmentioning

confidence: 99%

See 3 more Smart Citations

Fault Analysis and Mitigation Techniques of the I2C Bus for Nanosatellite Missions

Albalooshi¹,

Jallad

Marpu

2023

IEEE Access

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Despite the reliability concerns that are associated with the I2C bus, it is still one of the most popular on-board data busses to be used in nanosatellite missions. This paper provides a detailed fault analysis for the I2C bus in the context of nanosatellite missions, and consequently investigates and proposes potential mitigation techniques. The failure of the I2C bus is a risk that most CubeSat missions has to deal with, as the related bus failures can cause some catastrophic failures. Therefore, this study analyzes the I2C bus characteristics, the hardware and software requirements, and the key factors leading to I2C bus failure. By conducting experimental testing using the appropriate hardware and software to construct a comprehensive list of I2C bus requirements, characteristics, and failures. Based on the experimental testing possible mitigation approaches are proposed and finally a qualitative risk analysis is delivered to measure the impact of the methods on the overall mission success. The study shows high influence of the I2C bus on the CubeSat health and mission success, thus emphasizing on the importance of design considerations to reduce missions' risk level, as well as counting for runtime failures that can occur during mission operation.

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Section: A Overview Of the Busmentioning

confidence: 99%

Section: A Overview Of the Busmentioning

confidence: 99%

Section: A Overview Of the Busmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

See 2 more Smart Citations

Fault Analysis and Mitigation Techniques of the I2C Bus for Nanosatellite Missions

Albalooshi¹,

Jallad

Marpu

2023

IEEE Access

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“…The ESP8266 also shows interesting numbers in terms of power consumption, with a deep sleep mode value ≤ 10 μA and a power down leakage current ≤ 5 μA. In terms of interfaces, the ESP8266 natively supports the most commonly used communication protocols, for instance Inter IC (I2C) [21], Serial Peripheral Interface (SPI) [22] and Universal Asynchronous Receiver-Transmitter (UART) [22]. These interfaces have been useful to connect all the modules to the sensor node.…”

Section: Esp8266mentioning

confidence: 99%

On fast prototyping LoRaWAN: a cheap and open platform for daily experiments

Pulpito

Fornarelli

Pomo

et al. 2018

IET wirel. sens. syst.

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Low-Power Wide Area Networks (LPWANs) are gaining momentum within Internet of Things (IoT) circles, thanks to their inherent capabilities to simplify network topologies and increase coverage in low rate low power communications. This manuscript focuses on a specific LPWAN technology, namely Long Range Wireless Area Network (LoRaWAN), which is being widely investigated by the research community worldwide. LoRaWAN offers many noticeable features, including: wide coverage areas, security by design, power consumption and bandwidth optimization, and a high degree of flexibility and reconfigurability. Unfortunately, in spite of these valuable characteristics, LoRaWAN appliances are often closed source and proprietary. To bridge the gap, this manuscript proposes a prototype, which has been designed and set up using open low-cost experimental boards and programming tools, only. Moreover, an experimental campaign has been carried out in order to demonstrate the effectiveness of the developed platform.

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