Enhancement of Drain Current by an AlN Spacer Layer Insertion in AlGaN/GaN High-Electron-Mobility Transistors with Si-Ion-Implanted Source/Drain Contacts

Nanjo, Takuma; Motoya, Tsukasa; Imai, A.; Suzuki, Yosuke; Shiozawa, Katsuomi; Suita, Muneyoshi; Oishi, Toshiyuki; Abe, Yuji; Yagyu, Eiji; Yoshiara, Kiichi; Tokuda, Yasunori

doi:10.7567/jjap.50.064101

Cited by 24 publications

(19 citation statements)

References 26 publications

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“…Based on the peak position, we calculated the Al composition (x) of the Al x Ga 1−x N barrier layer to be 0.25, 0.23, and 0.22 for sample A, B, and C, respectively18. The AlN spacer layer is inserted between the Al x Ga 1−x N barrier and GaN to increase the conduction band offset and the 2DEG confinement in order to increase 2DEG concentration and mobility1920. Overall, samples A, B, C have the total epilayer thickness of 6.3, 2.0, and 1.2 μm, respectively (Fig.…”

Section: Resultsmentioning

confidence: 99%

Investigation of AlGaN/GaN high electron mobility transistor structures on 200-mm silicon (111) substrates employing different buffer layer configurations

Lee

Perozek

Rosario

et al. 2016

Sci Rep

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AlGaN/GaN high electron mobility transistor (HEMT) structures are grown on 200-mm diameter Si(111) substrates by using three different buffer layer configurations: (a) Thick-GaN/3 × {AlxGa1−xN}/AlN, (b) Thin-GaN/3 × {AlxGa1−xN}/AlN, and (c) Thin-GaN/AlN, so as to have crack-free and low-bow (<50 μm) wafer. Scanning electron microscopy, energy-dispersive X-ray spectroscopy, high resolution-cross section transmission electron microscopy, optical microscopy, atomic-force microscopy, cathodoluminescence, Raman spectroscopy, X-ray diffraction (ω/2θ scan and symmetric/asymmetric ω scan (rocking curve scan), reciprocal space mapping) and Hall effect measurements are employed to study the structural, optical, and electrical properties of these AlGaN/GaN HEMT structures. The effects of buffer layer stacks (i.e. thickness and content) on defectivity, stress, and two-dimensional electron gas (2DEG) mobility and 2DEG concentration are reported. It is shown that 2DEG characteristics are heavily affected by the employed buffer layers between AlGaN/GaN HEMT structures and Si(111) substrates. Particularly, we report that in-plane stress in the GaN layer affects the 2DEG mobility and 2DEG carrier concentration significantly. Buffer layer engineering is shown to be essential for achieving high 2DEG mobility (>1800 cm2/V∙s) and 2DEG carrier concentration (>1.0 × 1013 cm−2) on Si(111) substrates.

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Section: Resultsmentioning

confidence: 99%

Investigation of AlGaN/GaN high electron mobility transistor structures on 200-mm silicon (111) substrates employing different buffer layer configurations

Lee

Perozek

Rosario

et al. 2016

Sci Rep

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“…It is due to same barrier height for both devices, which leads to similar reverse biased characteristics. On the other hand, the band discontinuity at the interface between the channel and barrier regions, which is vital for forward leakage current, is much larger for the structure with the AlN spacer rather without spacer . This is due to enhanced polarization effects after insertion of AlN spacer layer.…”

Section: Resultsmentioning

confidence: 99%

Physics‐based mathematical model of 2DEG sheet charge density and DC characteristics of AlInN/AlN/GaN MOSHEMT

Jena

Swain

Lenka

2015

Int J Numerical Modelling

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In this paper, a physics-based analytical model for threshold voltage, two-dimensional electron gas (2DEG) sheet charge density and DC characteristics of the proposed spacer layer-based Al x In 1Àx N/AlN/GaN metal-oxidesemiconductor high electron mobility transistor is presented by considering the quasi-triangular quantum well. 2DEG sheet charge density (n s ) is obtained by the variation of Fermi level (E f ) with supply voltage and the formation of energy subbands E 0 and E 1 . An expression for the 2DEG sheet charge density (n s ), valid in all regions of device operation, is studied and applied to derive drain current. The proposed model results for sheet charge density and drain current are calculated and verified with experimental data over a full range of applied gate and drain voltages. Scaling of DC performance is studied as a function of gate length to explore the design space of proposed metal-oxide-semiconductor high electron mobility transistor. Suppression in the forward gate current is observed because of the insertion of AlN spacer that made it possible to apply a high gate voltage in the transistor operation and is very useful for high power and high frequency applications. Figure 3. (a) Variation of sheet carrier density (n s ) with respect to the thickness of the AlInN. (b) Variation of sheet charge density (n s ) with respect to AlN spacer thickness.

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“…High value of transconductance of the order of 0.0106 (S/μm) is obtained. Further it is notice that the transconductance does not grow beyond 1.5 nm (t s ), this happens due to reduction of ohmic contact resistance due to the increase in AIN spacer layer thickness [17]. Fig 4 shows the variation of electric field along the channel depth for different AlN spacer layer thickness, here we find the maximum electric field is for the 1.5 nm thickness of the spacer layer which means the maximum carrier density is reached at the t s =1.5 nm.…”

Section: Simulation Modelmentioning

confidence: 99%

Effect of AlN Spacer Layer Thickness on Device Performance of AIInN/AlN/GaN MOSHEMT

Adak

Swain

Pardeshi³

et al. 2015

2015 International Conference on Computing Communication Control and Automation

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In the present work, we have analyzed the influence of AlN spacer layer thickness (t s ) on device performances of 120 nm gate length AlInN/AlN/GaN MOS-HEMT device, using 2D Sentaurus TCAD simulation. Hydrodynamic model with due consideration of interface traps is used for the simulations. Due to high value of two-dimensional electron gas (2DEG) density and mobility in AlInN/AlN/GaN MOS-HEMT device, very high drain current (0.004 A/μm) density is achieved. Simulation of major device performance parameters such as transconductance (g m ), cutoff frequency (f t ) and total gate capacitance (C gg ) have been done for t s ranging from 0.5 nm to 2 nm. We have also optimized the spacer layer thickness for obtaining the maximum device performance.

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Enhancement of Drain Current by an AlN Spacer Layer Insertion in AlGaN/GaN High-Electron-Mobility Transistors with Si-Ion-Implanted Source/Drain Contacts

Cited by 24 publications

References 26 publications

Investigation of AlGaN/GaN high electron mobility transistor structures on 200-mm silicon (111) substrates employing different buffer layer configurations

Investigation of AlGaN/GaN high electron mobility transistor structures on 200-mm silicon (111) substrates employing different buffer layer configurations

Physics‐based mathematical model of 2DEG sheet charge density and DC characteristics of AlInN/AlN/GaN MOSHEMT

Effect of AlN Spacer Layer Thickness on Device Performance of AIInN/AlN/GaN MOSHEMT

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