Enhanced symbolic simulation for efficient verification of embedded array systems

Feng, Tao; Wang, Li-C.; Cheng, Kwang-Ting; Pandey, Manish; Abadir, Magdy S.

doi:10.1145/1119772.1119830

“…We also use our symbolic simulator to verify the memory management unit (MMU) in the high-performance microprocessors [Wang et al 1998;Feng et al 2003]. The MMU consists of two on-chip content addressable memory blocks [Pandey et al 1997] (BAT and TLB) to support the virtual memory address translation.…”

Section: Experimental Results: Symbolic Simulation On the Memory Manamentioning

confidence: 99%

Using 2-domain partitioned OBDD data structure in an enhanced symbolic simulator

Feng

¹

,

Wang

²

,

Cheng

³

et al. 2005

ACM Trans. Des. Autom. Electron. Syst.

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In this article, we propose a symbolic simulation method where Boolean functions can be efficiently manipulated through a 2-domain partitioned OBDD data structure. The functional partition is applied by automatically exploring the key decision points implicitly built inside a circuit. The partition can help to significantly reduce the OBDD sizes, solving problems that could not be solved with monolithic OBDD data structure. We demonstrate the performance of the approach through the symbolic simulation of several benchmark circuits with complex control logics and datapath. The symbolic simulation based on 2-domain partitioned OBDD can be also applied in equivalence checking. It can generate the signature of functions to identify the critical partition points in the optimized gate-level netlist.

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“…Symbolic simulation has been applied in circuits for logic and timing verification, as well as sequential test generation [9,18,26,29,31] and determination of applicationspecific V min [14]. Symbolic simulation has also been applied for software verification [49].…”

Section: Related Workmentioning

confidence: 99%

Determining Application-specific Peak Power and Energy Requirements for Ultra-low Power Processors

Cherupalli

¹

,

Duwe

²

,

Ye

³

et al. 2017

SIGOPS Oper. Syst. Rev.

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Many emerging applications such as IoT, wearables, implantables, and sensor networks are power-and energyconstrained. These applications rely on ultra-low-power processors that have rapidly become the most abundant type of processor manufactured today. In the ultra-low-power embedded systems used by these applications, peak power and energy requirements are the primary factors that determine critical system characteristics, such as size, weight, cost, and lifetime. While the power and energy requirements of these systems tend to be application-specific, conventional techniques for rating peak power and energy cannot accurately bound the power and energy requirements of an application running on a processor, leading to over-provisioning that increases system size and weight. In this paper, we present an automated technique that performs hardware-software coanalysis of the application and ultra-low-power processor in an embedded system to determine application-specific peak power and energy requirements. Our technique provides more accurate, tighter bounds than conventional techniques for determining peak power and energy requirements, reporting 15% lower peak power and 17% lower peak energy, on average, than a conventional approach based on profiling and guardbanding. Compared to an aggressive stressmarkbased approach, our technique reports power and energy bounds that are 26% and 26% lower, respectively, on average. Also, unlike conventional approaches, our technique reports guaranteed bounds on peak power and energy independent of an application's input set. Tighter bounds on peak power and energy can be exploited to reduce system size, weight, and cost.

show abstract

“…Symbolic simulation has been applied in circuits for logic and timing verification, as well as sequential test generation [9,18,26,29,31] and determination of applicationspecific V min [14]. Symbolic simulation has also been applied for software verification [49].…”

Section: Related Workmentioning

confidence: 99%

Determining Application-specific Peak Power and Energy Requirements for Ultra-low Power Processors

Cherupalli

¹

,

Duwe

²

,

Ye

³

et al. 2017

Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Syst

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Many emerging applications such as IoT, wearables, implantables, and sensor networks are power-and energyconstrained. These applications rely on ultra-low-power processors that have rapidly become the most abundant type of processor manufactured today. In the ultra-low-power embedded systems used by these applications, peak power and energy requirements are the primary factors that determine critical system characteristics, such as size, weight, cost, and lifetime. While the power and energy requirements of these systems tend to be application-specific, conventional techniques for rating peak power and energy cannot accurately bound the power and energy requirements of an application running on a processor, leading to over-provisioning that increases system size and weight. In this paper, we present an automated technique that performs hardware-software coanalysis of the application and ultra-low-power processor in an embedded system to determine application-specific peak power and energy requirements. Our technique provides more accurate, tighter bounds than conventional techniques for determining peak power and energy requirements, reporting 15% lower peak power and 17% lower peak energy, on average, than a conventional approach based on profiling and guardbanding. Compared to an aggressive stressmarkbased approach, our technique reports power and energy bounds that are 26% and 26% lower, respectively, on average. Also, unlike conventional approaches, our technique reports guaranteed bounds on peak power and energy independent of an application's input set. Tighter bounds on peak power and energy can be exploited to reduce system size, weight, and cost.

show abstract

Enhanced symbolic simulation for efficient verification of embedded array systems

Cited by 8 publications

References 19 publications

Using 2-domain partitioned OBDD data structure in an enhanced symbolic simulator

Using 2-domain partitioned OBDD data structure in an enhanced symbolic simulator

Determining Application-specific Peak Power and Energy Requirements for Ultra-low Power Processors

Determining Application-specific Peak Power and Energy Requirements for Ultra-low Power Processors

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