2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC) 2013
DOI: 10.1109/apec.2013.6520257
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Enhanced shielded-gate trench MOSFETs for high-frequency, high-efficiency computing power supply applications

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Cited by 12 publications
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“…Additionally, C DS1 and C DS2 help to lower the peak overshoot voltage stress on the SGT-MOSFET. This stress comes from circuit parasitic and high dv/dt immunity in switching converter circuits [53]. The terminal capacitance of both devices is shown in Fig.…”
Section: Resultsmentioning
confidence: 99%
“…Additionally, C DS1 and C DS2 help to lower the peak overshoot voltage stress on the SGT-MOSFET. This stress comes from circuit parasitic and high dv/dt immunity in switching converter circuits [53]. The terminal capacitance of both devices is shown in Fig.…”
Section: Resultsmentioning
confidence: 99%
“…Regarding FP-MOSFETs, it is obvious that there is a potential to reduce P CON , P SW(on) , and P SW(off) drastically, and several power loss analysis has been reported so far. [24][25][26][27][28][29][30] However, owing to their structure, the output capacitance (C oss ) which leads to P Qoss is a significant issue, especially in the case of megahertz switching. 31) In this paper, we describe a structure-based capacitance model of the FP-MOSFET, which was proposed in a related report, 32) to estimate power loss under various conditions.…”
Section: Introductionmentioning
confidence: 99%