Enhanced performance analysis of vertical strained-sigeimpact Ionization MOSFET (VESIMOS)

RSM 2013 IEEE Regional Symposium on Micro and Nanoelectronics

Zuhir

et al. 2013

Self Cite

Single Channel (SC) and Dual Channel (DC) VerticalStrained-SiGe Impact Ionization MOSFET (VESIMOS) has been successfully simulated and analyzed in this paper. Found out that SC VESIMOS operate in conventional MOSFET mode at V DS = 1.75V, with 10% to 30% Ge mole fraction. However for Ge=50%, it's operated in Impact Ionization (II) mode with fast switching speed of subthreshold value, S=9.8 mV/dec. A better performance in threshold voltage, V TH , S value and I ON /I OFF ratio were found in DC VESIMOS as compared to SC VESIMOS. The V TH =0.6V, S=10.98 mV/dec and I ON /I OFF = 1×10 13 were measured in DC VESIMOS with Ge=30% that clarify the advantage of DC utilization on VESIMOS device. These improvements were mainly due to the enhancement of electron mobility from 600 m 2 /V-s (first channel) to 1400 m 2 /V-s (second channel). The electron mobility was increased due to the splitting of conduction band valley into six fold where the electron mass are reduced in out of plane direction and thus enhanced the mobility of electron.

Section: Device Performance and Analysismentioning

confidence: 96%

“…Operation of IMOS required high drain voltage (V DS ) and direct proportional to the temperature produced. Hot carriers effects generated when IMOS is in high temperature where the electrons started to destroy the gate oxide of the MOS [12][29]. Vertical Impact Ionization was introduced to overcome the hot carrier effect problem.…”

Section: Introductionmentioning

confidence: 99%

Single and dual strained channel analysis of vertical strained — SiGe impact ionization MOSFET (VESIMOS)

RSM 2013 IEEE Regional Symposium on Micro and Nanoelectronics

Zuhir

et al. 2013

Self Cite

“…It showed both reduction in threshold voltage and supply voltage of about 0.7V. This compressive strain developed results in high carrier mobility, high impact ionization rates and better ON-OFF current ratios, besides retaining the good subthreshold slopes shown by vertical IMOS devices [14][15].…”

Section: Introductionmentioning

confidence: 94%

“…The high doping of the delta layer which creates a large potential barrier makes it possible to achieve high electric fields in the intrinsic zone near the drain without applying a very high V DS [15]. A positive gate source voltage, V GS is necessary to lower the barrier and allow the electron flow from source to drain forming a significant ON current of the device.…”

Section: Device Structurementioning

confidence: 99%

Performance Analysis of Vertical Strained-SiGe Impact Ionization MOSFET Incorporating Dielectric Pocket (VESIMOS-DP)

Hamzah

2013 Fifth International Conference on Computational Intelligence, Modelling and Simulation

et al. 2013

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The Vertical Strained Silicon Germanium (SiGe) Impact Ionization MOSFET with Dielectric Pocket (VESIMOS-DP) has been successfully developed and analyzed in this paper. The comparison between VESIMOS and VESIMOS-DP was done to show the advantages of incorporating dielectric pocket (DP) to the performance of the device. An improved stability of threshold voltage, VTH was found for VESIMOS-DP device of various DP size ranging from 20nm to 80nm. The stability is due to the reducing charge sharing effects between source and drain region. However, the presence of DP layer has introduced another potential barrier in addition to the delta p+ (δp+) triangular potential barrier. Thus, increased amount of gate voltage needed to overcome those barriers and allows the electrons to flow from source to drain. Moreover, the DP layer has suppressed the parasitic bipolar transistor effect (PBT) with higher breakdown voltage as compared to without DP layer. Hence, the incorporation of DP into VESIMOS has enhanced its performance and presents elevated characteristics for nano-electronics device.

“…This compressive strain developed results in high carrier mobility, high impact ionization rates and better ON-OFF current ratios, besides retaining the good subthreshold slopes shown by vertical IMOS device [22][23][24]. However, this device suffers low breakdown voltage and parasitic bipolar transistors (PBT) effect [25].…”

Section: Introductionmentioning

confidence: 99%

Body doping analysis of vertical strained-SiGe Impact Ionization MOSFET incorporating dielectric pocket (VESIMOS-DP)

Zuhir

RSM 2013 IEEE Regional Symposium on Micro and Nanoelectronics

et al. 2013

Self Cite

The Vertical Strained Silicon Germanium (SiGe) Impact Ionization MOSFET with Dielectric Pocket (VESIMOS-DP) has been successfully developed and analyzed in this paper. There are significant drop in subthreshold slope (S) while threshold voltage is increase as the body doping concentration increases. It is notable that for body doping concentration above 10 20 , the S values keep increasing which is not recommended as the switching speed getting higher distracting performance of the device. An improved stability of threshold voltage, V TH was found for VESIMOS-DP device of various DP size ranging from 20nm to 80nm. The stability is due to the reducing charge sharing effects between source and drain region. In addition, the output characteristic was also highlighted a very good drain current at different gate voltage with the increasing of drain voltage for VESIMOS-DP with high body doping concentration. VESIMOS-DP with low body doping concentration suffers PBT effect that prevents the device from being able to switch off. Hence, high body doping concentrations are imperative for obtaining better device characteristics and ensure the device works in II mode.