Enhanced Electrical Performance and Bias‐Stress Stability of Solution‐Processed Bilayer Metal Oxide Thin‐Film Transistors

Abstract

Herein, solution‐processed indium gallium zinc oxide (IGZO) thin‐film transistors (TFTs) with a bilayer structure are investigated by embedding an ultrathin layer of indium zinc oxide (IZO) between the gate dielectric and IGZO film. The optimized IGZO/IZO bilayer TFTs exhibit a high field‐effect mobility (μFE) of 8.3 cm2 V−1 s−1, and the bias‐stress stability of the bilayer TFTs is greatly improved compared with that of the single‐layer IGZO devices. In addition, temperature‐dependent mobility and VT are investigated to reveal the trap distribution in the bilayer IGZO/IZO and single‐layer IGZO TFTs. Moreover, low‐voltage bilayer TFTs with a high mobility of 10.4 cm2 V−1 s−1 are demonstrated.

Investigation on Atomic Bonding Structure of Solution-Processed Indium-Zinc-Oxide Semiconductors According to Doped Indium Content and Its Effects on the Transistor Performance

“…As shown in the log-log scale graph in Figure 3 c, the on-state current and field-effect mobility were exponentially proportional to the In concentration. As shown in Figure 3 and Table 2 , the most ideal TFT operating characteristics with respect to the In molar concentration were observed at 0.125 M; the TFT performance obtained at the fabrication condition of 0.125 M in this study was quite decent, compared to the results in the literature [ 33 , 34 ]. For this TFT, the lower subthreshold voltage swing (S/S) was the lowest, and the on/off ratio was the highest.…”

Solution-processed zirconium acetylacetonate charge-trap layer for multi-bit nonvolatile thin-film memory transistors

“…where and are the width and length of the transistor, is the capacitance of the gate dielectric and is the gate-to-source voltage [ 37 ]. The mobility of the PD-TFT and that of the PD-CTM RT were calculated to be 0.15 cm 2 V −1 s −1 and 0.04 cm 2 V −1 s −1 respectively and this reduction is better than other reported CTMs with similar structural configuration [ 14 ].…”

Solution-processed bilayer InGaZnO/In2O3 thin film transistors at low temperature by lightwave annealing

“…For the deposition of low-voltage oxide TFTs, a 30 nm AlO x film was adopted as the gate dielectric. The fabrication procedure of AlO x film was similar to previous work [27,34]. The top source and drain electrodes were fabricated by thermal evaporation of 70 nm Al.…”

“…Solution-based approaches show immense potential in high-throughput flexible electronic applications taking advantage of cost efficiency, atmospheric fabrication, and mass productivity, and thus have attracted great interest [24]. Typical solution process requires relatively high annealing temperatures (350 °C) to eliminate the organic residues and establish a stable metal-oxygen system as a means of densification [11,[25][26][27][28][29]. However, the hightemperature process is incompatible with most flexible and stretchable substrates, which is an obstacle for flexible electronic application.…”