Enhanced adhesion and performance of the source/drain electrode using a single-layered Ag(Cu) film for an amorphous silicon thin-film transistor

Hong, Sung Ju; Lee, S.; Park, J. B.; Yang, H. J.; Ko, Yongmin; Lee, J. G.; Cho, B. S.; Jeong, Changwook; Chung, Kevin Kien Hoa

doi:10.1063/1.1621074

Cited by 6 publications

(2 citation statements)

References 13 publications

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“…This facilitates the formation of copper silicide upon postannealing. The copper silicide formed is thermodynamically stable in the presence of a-Si:H. It provides a stable contact structure 11 and lowers the contact resistance. 10 The additional Ni alloying element suppresses the excessive grain growth of Cu on copper oxide upon annealing at 300°C and improves the adhesion of the copper oxide to Si, as well as to glass.…”

Section: Introductionmentioning

confidence: 99%

Fabrication of Source/Drain Electrodes for a-Si:H Thin-Film Transistors Using a Single Cu Alloy Target

Lee

Nam

et al. 2011

Journal of Elec Materi

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A Cu alloy/Cu alloy oxide bilayer structure was formed on an n + -a-Si:H substrate using a single Cu alloy target. It was employed for the source/drain electrodes in the fabrication of a-Si:H thin-film transistors with good electrical performance, high thermal stability, and good adhesion. Transmission electron microscopy and electron energy-loss spectroscopy analyses revealed that the initial sputtering of the Cu alloy in O 2 /Ar allowed for preferential oxidation of Si and the formation of a SiO x /Cu-supersaturated a-Si:H bilayer at the copper oxide-a-Si:H interface. This bilayer turned into an SiO x /Cu 3 Si bilayer after annealing at 300°C. It provided a stable contact structure with low contact resistance.

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Section: Introductionmentioning

confidence: 99%

Fabrication of Source/Drain Electrodes for a-Si:H Thin-Film Transistors Using a Single Cu Alloy Target

Lee

Nam

et al. 2011

Journal of Elec Materi

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“…Therefore, Ag is studied as a candidate for low resistivity electrode of TFTs [2]. Silver thin films have been prepared by using PVD [2][3][4], electro-beam evaporation [5], thermal evaporation, electroplating and electroless plating, etc. Electroless plating technique is one of the important wet processes which have been popularly used for (printed circuit board) PCB and VLSI applications.…”

Section: Introductionmentioning

confidence: 99%

Performance of Low Resistivity Electrode Prepared by Electroless Plated for Amorphous Silicon Thin-Film Transistors

Tsay

Lin

et al. 2007

MSF

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The TFTs array fabrication process for large-area TFT-LCD has been continuously developed for simplifying processing steps, improving performance and reducing cost in the process of mass production. In this study, the hydrogenated amorphous silicon (a-Si:H) TFTs with low resistivity electrodes , silver thin films, were prepared by using the selective deposition method that combined lift-off and electroless plated processes. This developed process can direct pattern the electrode of transistor devices without the etching process and provide ease processing steps. The as-deposited Ag films were annealed at 200 oC for 10 minutes under N2 atmosphere. The results shows that the adhesion properties can be enhanced and the resistivity has been improved from 6.0 μ,-cm, significantly decrease by 35%, of as-deposited Ag films by annealed. The thickness of Ag thin film is about 100 nm and the r. m. s roughness value is 1.54 nm. The a-Si:H TFT with Ag thin films as source and drain electrodes had a field effect mobility of 0.18 cm2/Vs, a threshold voltage of 2.65 V, and an on/off ratio of 3×104.

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An investigation of optimal interfacial film condition for Cu-Mn alloy based source/drain electrodes in hydrogenated amorphous silicon thin film transistors

2012

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To aid in developing next generation Cu-Mn alloy based source/drain interconnects for thin film transistor liquid crystal displays (TFT-LCDs), we have investigated the optimal structure of a pre-formed oxide layer on phosphorus doped hydrogenated amorphous silicon (n+a-Si:H) that does not degrade TFT electrical properties. We use transmission electron microscopy (TEM) and electron energy loss spectroscopy (EELS) to examine composition depth profiles of and structural information for the Cu-Mn alloy/n+a-Si:H interface region. In aiming to achieve the same electrical properties as those of TFTs having conventional Mo source/drain electrodes, we have obtained three important findings: (1) in typical TFT-LCD manufacturing processes, no Mn complex oxide layer is formed because Mn cannot diffuse substantially into an n+a-Si:H surface during low temperature (below 300°C) processes and the growth of Mn complex oxide layer would also be limited by the absence of excess oxygen species; (2) a pre-formed silicon oxide layer much thicker than 1 nm severely degrades TFT electrical properties and therefore an ultrathin (≈1 nm) silicon oxide layer is required to prevent the degradation; (3) Cu diffuses into an n+a-Si:H layer at oxygen-deficient spots and thus uniform surface oxidation is required to prevent the diffusion

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Enhanced adhesion and performance of the source/drain electrode using a single-layered Ag(Cu) film for an amorphous silicon thin-film transistor

Cited by 6 publications

References 13 publications

Fabrication of Source/Drain Electrodes for a-Si:H Thin-Film Transistors Using a Single Cu Alloy Target

Fabrication of Source/Drain Electrodes for a-Si:H Thin-Film Transistors Using a Single Cu Alloy Target

Performance of Low Resistivity Electrode Prepared by Electroless Plated for Amorphous Silicon Thin-Film Transistors

An investigation of optimal interfacial film condition for Cu-Mn alloy based source/drain electrodes in hydrogenated amorphous silicon thin film transistors

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