Fabrication of Source/Drain Electrodes for a-Si:H Thin-Film Transistors Using a Single Cu Alloy Target

Lee, J. H.; Lee, C. Y.; Nam, Hyung Seok; Lee, J. G.; Yang, H. J.; Ho, W.J.; Jeong, Jiyong; Koo, Donghwan

doi:10.1007/s11664-011-1728-4

Cited by 3 publications

(2 citation statements)

References 13 publications

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“…[9][10][11][12][13][14][15][16][17][18][19] As the electrode/interconnection materials for the amorphous IGZO TFTs, Cu is preferred in the display and Si-integrated circuit (IC) industry due to its low resistivity (high conductivity), which is directly related to the pixel resolution, aperture ratio, and display drive speed. [20][21][22][23][24][25][26] In fact, Cu was already well adapted to a semiconductor using a Cu diffusion barrier layer and an a-Si based display industry using SiN x as gate insulators (GIs). [20][21][22][23][24][25][26] Nonetheless, the Cu interconnection has not been well obtained in amorphous IGZO TFT panel 27 due to the adhesion mismatch between Cu and SiO 2 .…”

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confidence: 99%

“…[20][21][22][23][24][25][26] In fact, Cu was already well adapted to a semiconductor using a Cu diffusion barrier layer and an a-Si based display industry using SiN x as gate insulators (GIs). [20][21][22][23][24][25][26] Nonetheless, the Cu interconnection has not been well obtained in amorphous IGZO TFT panel 27 due to the adhesion mismatch between Cu and SiO 2 . The nature of this poor interfacial adhesion is attributed to the CuO x formation between SiO 2 and Cu during post thermal treatment.…”

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confidence: 99%

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Advanced Cu Interconnection via Electroless-Plated Ni Interlayer on the Gate of Oxide Thin-Film Transistors

Nam

Moon²,

Lee³

et al. 2014

ECS J. Solid State Sci. Technol.

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We demonstrate Cu interconnection/electrode formation in bottom gate InGaZnO (IGZO) thin-film transistors (TFTs), so that conductivity may be enhanced and a more advanced display panel may replace conventional Al and Mo. To date, the development of a Cu interconnection/electrode has been hampered by the poor adhesion between Cu and SiO 2 , the main gate insulator (GI) for IGZO TFTs. However, our research shows that an electro-less selective plating of Na-free Ni on pre-patterned Cu electrodes can make this goal obtainable. According to the bias-and photo-stability measurements, our IGZO TFT with Na-free Ni-plated Cu electrodes are much more stable than IGZO TFTs prepared with conventional methods such as NaOH-induced Ni plating on Cu and H-containing SiN x /SiO 2 double layer GI on Cu. Moreover, the conventionally-prepared devices were also photo-sensitive due to the Na or H ions diffused into the GI/channel interface area. We conclude that electro-less plating of Na-free Ni on Cu is a promising approach for advanced future display panel by oxide TFTs.Until recently, amorphous (a)-Si based thin-film transistor (TFT) has led the liquid crystal display (LCD) industry due to its superior uniformity at large scale. However, the more developed display industry is now demanding higher performance and resolution than available in general a-Si TFTs. High-performance TFT-LCD and active matrix organic light-emitting diodes (AMOLEDs) are now being fabricated with low-temperature poly-Si (LTPS) TFT technology, which has limitations in large-scale displays in addition to process complexity and cost. As an alternative to such Si-based TFTs, amorphous oxide semiconductor TFTs have recently attracted much attention due to their mobility, operational stability, and simple fabrication process.

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Advanced Cu Interconnection via Electroless-Plated Ni Interlayer on the Gate of Oxide Thin-Film Transistors

Nam

Moon²,

Lee³

et al. 2014

ECS J. Solid State Sci. Technol.

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Sputtering Targets and Thin Films for Flat Panel Displays and Photovoltaics

Sarkar¹

2014

Sputtering Materials for VLSI and Thin Film Devices

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An investigation of optimal interfacial film condition for Cu-Mn alloy based source/drain electrodes in hydrogenated amorphous silicon thin film transistors

2012

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To aid in developing next generation Cu-Mn alloy based source/drain interconnects for thin film transistor liquid crystal displays (TFT-LCDs), we have investigated the optimal structure of a pre-formed oxide layer on phosphorus doped hydrogenated amorphous silicon (n+a-Si:H) that does not degrade TFT electrical properties. We use transmission electron microscopy (TEM) and electron energy loss spectroscopy (EELS) to examine composition depth profiles of and structural information for the Cu-Mn alloy/n+a-Si:H interface region. In aiming to achieve the same electrical properties as those of TFTs having conventional Mo source/drain electrodes, we have obtained three important findings: (1) in typical TFT-LCD manufacturing processes, no Mn complex oxide layer is formed because Mn cannot diffuse substantially into an n+a-Si:H surface during low temperature (below 300°C) processes and the growth of Mn complex oxide layer would also be limited by the absence of excess oxygen species; (2) a pre-formed silicon oxide layer much thicker than 1 nm severely degrades TFT electrical properties and therefore an ultrathin (≈1 nm) silicon oxide layer is required to prevent the degradation; (3) Cu diffuses into an n+a-Si:H layer at oxygen-deficient spots and thus uniform surface oxidation is required to prevent the diffusion

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Fabrication of Source/Drain Electrodes for a-Si:H Thin-Film Transistors Using a Single Cu Alloy Target

Cited by 3 publications

References 13 publications

Advanced Cu Interconnection via Electroless-Plated Ni Interlayer on the Gate of Oxide Thin-Film Transistors

Advanced Cu Interconnection via Electroless-Plated Ni Interlayer on the Gate of Oxide Thin-Film Transistors

Sputtering Targets and Thin Films for Flat Panel Displays and Photovoltaics

An investigation of optimal interfacial film condition for Cu-Mn alloy based source/drain electrodes in hydrogenated amorphous silicon thin film transistors

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