Energy efficient QCA circuits design: simulating and analyzing partially reversible pipelines

Chaves, Jeferson F.; Ribeiro, Marco A.; Silva, Leandro M.; Assis, Leonardo M. B. C. de; Torres, Marzo S.; Neto, Omar P. Vilela

doi:10.1007/s10825-017-1120-6

Cited by 22 publications

(4 citation statements)

References 20 publications

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“…The total quantum cost of the proposed design is calculated by summation of the quantum cost of 2, 2, 3, 4, and 5-bits RCA blocks, 2:1 multiplexers, and 3, 4, 5, and 6-bits QBEC modules used in the structure equal to 222. In a general manner for n-bits design, the total quantum cost of the proposed method is determined by (5), assuming that HNG, COG, and the proposed QBEC modules are applied in the structure as they are optimized in terms of quantum cost:…”

Section: It Is Due To the Inherent Reversible Propertymentioning

confidence: 99%

“…Reversibility in computations means that no information loss occurs during computation. Reversible logic has an extensive range of applications such as quantum computing, optical computing, DNA processing, low power design, and designing nanotechnology-based systems [4,5]. Quantum computers are computational systems renowned for their extensive small size and fast speed since they apply tiny particles with identically atomic or photonic characteristics named qubits.…”

Section: Introductionmentioning

confidence: 99%

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Toward Designing High-Speed Cost-Efficient Quantum Reversible Carry Select Adders

Moghimi,

Reshadinezhad,

Rubio

2023

IEEE Trans. Emerg. Topics Comput.

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Reversible logic provides the best platform for implementing quantum computation models in digital systems. With the objective of preventing the loss of information, reversible logic does not let energy be wasted in the form of thermal dissipation. Adder circuits are the central computational part of all digital processing units like CPUs and ALUs. Therefore, their power consumption and speed directly affect the overall system performance and functionality of a computing unit. This work presents a comprehensive study introducing different new carry select adders (CSLA) based on quantum and reversible logic. Five reversible CSLA designs are proposed and compared evaluating contrast criteria like speed, quantum cost, and area with previously published schemes. The comparative metrics are formulized for arbitrary n-bits size blocks. Each design type is described in a generic way, capable of implementing carry select adder of any size. As the best result, this study proposes an optimized reversible adder circuit in terms of quantum propagation delay, reaching an acceptable trade-off with quantum cost compared to its counterparts. Verification has been made through Simulations and synthesis on Altera Cyclone V FPGA using Intel Quartus Prime Design and ModelSim software.

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Section: It Is Due To the Inherent Reversible Propertymentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Toward Designing High-Speed Cost-Efficient Quantum Reversible Carry Select Adders

Moghimi,

Reshadinezhad,

Rubio

2023

IEEE Trans. Emerg. Topics Comput.

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“…The robustness of the flip flop is calculated in terms of Kink Energy and Energy dissipations. The application of partially reversible pipelines is demonstrated for designing energy efficient QCA circuit in [14]. A new coplanar design of Full Adder/ Substractor using QCA technology is proposed in [15].…”

Section: Related Workmentioning

confidence: 99%

Implementing Logical Circuits with Four Phase Quantum Dot Cellular Clock using QCA Designer

Pathak*,

Singh

2020

IJRTE

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Quantum Dot Cellular Automata (QCA) is treated as a most promising technology after CMOS techniques. The major advantages of QCA techniques are faster speed, lower energy consumption and smaller size. The implementation of clocks play very big role in the effective design of QCA circuits. In this paper, a QCA circuit is designed using the concept of QCA clocks. The proposed study describes a new method of implementing the logical function with power depletion analysis. The proposed logical function uses total number of 57 cells in which the area of each cell 372 nm2. The energy dissipation in this implementation is 18.79 meV and the total acquired area is 0.192 µm2. The proposed circuit is implemented utilizing QCA Designer. The proposal is excellent in the realization of nano-scale computing with minimal power utilization. The results are compared with the existing approaches and improvements of 6% in the area required and 7% in the number of cells are achieved

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“…In QCA technology, the basic cell consists of four quantum dots containing two electrons capable of tunneling between adjacent dots. The position of the electrons represents the logical state of the cell [4], [6]. Unlike traditional CMOS structures in which the information is transmitted via the flow of electrical current, the QCA technology relies on the columbic interactions among adjacent cells to enable data transmission [4].…”

Section: Introductionmentioning

confidence: 99%

Design and analysis of single layer quantum dot-cellular automata based 1- bit comparators

Altarawneh

Al-Tarawneh

2022

TELKOMNIKA

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Energy efficient QCA circuits design: simulating and analyzing partially reversible pipelines

Cited by 22 publications

References 20 publications

Toward Designing High-Speed Cost-Efficient Quantum Reversible Carry Select Adders

Toward Designing High-Speed Cost-Efficient Quantum Reversible Carry Select Adders

Implementing Logical Circuits with Four Phase Quantum Dot Cellular Clock using QCA Designer

Design and analysis of single layer quantum dot-cellular automata based 1- bit comparators

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