Energy-Efficient Neuron, Synapse and STDP Integrated Circuits

Cruz-Albrecht, Jose; Yung, M.W.; Srinivasa, Narayan

doi:10.1109/tbcas.2011.2174152

Cited by 181 publications

(96 citation statements)

References 35 publications

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“…TrueNorth, however, does not incorporate any information pertaining to the learning mechanisms. Neuron scientists discovered that learning rules follows spike-timing dependent plasticity (STDP) [78]. Brain processes asynchronously spike streams for recognition and extraction of repetitive patterns in a fully unsupervised way.…”

Section: Bio-inspired Ultra-low-power Computingmentioning

confidence: 99%

Ultra-Low-Power Design and Hardware Security Using Emerging Technologies for Internet of Things

et al. 2017

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Abstract:In this review article for Internet of Things (IoT) applications, important low-power design techniques for digital and mixed-signal analog-digital converter (ADC) circuits are presented. Emerging low voltage logic devices and non-volatile memories (NVMs) beyond CMOS are illustrated. In addition, energy-constrained hardware security issues are reviewed. Specifically, light-weight encryption-based correlational power analysis, successive approximation register (SAR) ADC security using tunnel field effect transistors (FETs), logic obfuscation using silicon nanowire FETs, and all-spin logic devices are highlighted. Furthermore, a novel ultra-low power design using bio-inspired neuromorphic computing and spiking neural network security are discussed.

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Section: Bio-inspired Ultra-low-power Computingmentioning

confidence: 99%

Ultra-Low-Power Design and Hardware Security Using Emerging Technologies for Internet of Things

et al. 2017

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“…The actual computation of neural dynamics is implemented in the Processing Core. Unlike the architectures discussed before, the HRL chip emulates a simplified version of the leaky integrate-and-fire neuron model which is highly optimized for low energy consumption (Cruz-Albrecht, Yung, & Srinivasa, 2012). The model neither supports inhibitory synaptic input nor does it have a refractory period following after spike emission.…”

Section: The Hrl Synapse Projectmentioning

confidence: 99%

Neuromorphic implementations of neurobiological learning algorithms for spiking neural networks

2015

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a b s t r a c tThe application of biologically inspired methods in design and control has a long tradition in robotics. Unlike previous approaches in this direction, the emerging field of neurorobotics not only mimics biological mechanisms at a relatively high level of abstraction but employs highly realistic simulations of actual biological nervous systems. Even today, carrying out these simulations efficiently at appropriate timescales is challenging. Neuromorphic chip designs specially tailored to this task therefore offer an interesting perspective for neurorobotics. Unlike Von Neumann CPUs, these chips cannot be simply programmed with a standard programming language. Like real brains, their functionality is determined by the structure of neural connectivity and synaptic efficacies. Enabling higher cognitive functions for neurorobotics consequently requires the application of neurobiological learning algorithms to adjust synaptic weights in a biologically plausible way. In this paper, we therefore investigate how to program neuromorphic chips by means of learning. First, we provide an overview over selected neuromorphic chip designs and analyze them in terms of neural computation, communication systems and software infrastructure. On the theoretical side, we review neurobiological learning techniques. Based on this overview, we then examine on-die implementations of these learning algorithms on the considered neuromorphic chips. A final discussion puts the findings of this work into context and highlights how neuromorphic hardware can potentially advance the field of autonomous robot systems. The paper thus gives an in-depth overview of neuromorphic implementations of basic mechanisms of synaptic plasticity which are required to realize advanced cognitive capabilities with spiking neural networks.

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“…One of the main issues in this pursuit is the lack of suitable hardware for the implementation of key elements of a typical ANNneurons and synapses. While the CMOS based neurons are nowadays commercially available, 1 the appropriate candidate for the synapse is still under discussion. There are two main possible ways of synapse realization: a digital one (e.g., as the Static Random Access Memory 2 or floating gate transistor 3 ) and an analogue one (memristive device).…”

Section: Introductionmentioning

confidence: 99%

First steps towards the realization of a double layer perceptron based on organic memristive devices

et al. 2016

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Memristors are widely considered as promising elements for the efficient implementation of synaptic weights in artificial neural networks (ANNs) since they are resistors that keep memory of their previous conductive state. Whereas demonstrations of simple neural networks (e.g., a single-layer perceptron) based on memristors already exist, the implementation of more complicated networks is more challenging and has yet to be reported. In this study, we demonstrate linearly nonseparable combinational logic classification (XOR logic task) using a network implemented with CMOS-based neurons and organic memrisitive devices that constitutes the first step toward the realization of a double layer perceptron. We also show numerically the ability of such network to solve a principally analogue task which cannot be realized by digital devices. The obtained results prove the possibility to create a multilayer ANN based on memristive devices that paves the way for designing a more complex network such as the double layer perceptron.

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Energy-Efficient Neuron, Synapse and STDP Integrated Circuits

Cited by 181 publications

References 35 publications

Ultra-Low-Power Design and Hardware Security Using Emerging Technologies for Internet of Things

Ultra-Low-Power Design and Hardware Security Using Emerging Technologies for Internet of Things

Neuromorphic implementations of neurobiological learning algorithms for spiking neural networks

First steps towards the realization of a double layer perceptron based on organic memristive devices

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