Energy Efficient Low-Noise Neural Recording Amplifier With Enhanced Noise Efficiency Factor

Majidzadeh, Vahid; Schmid, Alexandre; Leblebici, Yusuf

doi:10.1109/tbcas.2010.2078815

Cited by 145 publications

(54 citation statements)

References 16 publications

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“…CMOS 180 nm were taken into account. It can be seen that the recording channel presented in [28] has one of the best parameters. Still, the work presented in this paper has larger functionality, i.e., it allows for individual recording channels parameter setting in a broad range.…”

Section: Low-power Low-area Techniques For Multichannel Recording Cirmentioning

confidence: 99%

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Low-power low-area techniques for multichannel recording circuits dedicated to biomedical experiments

Kmon¹

2016

Bulletin of the Polish Academy of Sciences Technical Sciences

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Abstract. This paper presents techniques introduced to minimize both power and silicon area of the multichannel integrated recording circuits dedicated to biomedical experiments. The proposed methods were employed in multichannel integrated circuit fabricated in CMOS 180nm process and were validated with the use of a wide range of measurements. The results show that both a single recording channel and correction blocks occupy about 0.061 mm 2 of the area and consume only 8.5 µW of power. The input referred noise is equal to 4.6 µV RMS . With the use of additional digital circuitry, each of the recording channels may be independently configured. The lower cut-off frequency may be set within the range of 0.1 Hz-700 Hz, while the upper cut-off frequency, depending on the recording mode chosen, can be set either to 3 kHz/13 kHz or may be tuned in the 2 Hz-400 Hz range. The described methods were introduced in the 64-channel integrated circuit. The key aspect of the proposed design is the fact that proposed techniques do not limit functionality of the system and do not deteriorate its overall parameters. minimization of power consumption affects the IRN whilst recording channels area minimization may limit the functionality of the system, have adverse effect on the IRN or deteriorate uniformity of its main parameters. Therefore, one needs to propose solutions to both effectively utilize the available power and area budgets, and not to deteriorate other important parameters. There are many prominent examples of systems that present different approaches for recording channels architecture [3,6,[13][14][15][16]. In this paper, the design of the whole recording path is presented with the emphasis on the methods allowing for minimization of both power and area with no negative influence on other system parameters.The paper is organized as follows. In Section 2, the design of a recording channel is presented with a special attention paid on its power consumption and area occupation. Section 3 provides information regarding analog multiplexer where techniques for the area and power minimization are also presented. Section 4 looks at the measurement results of designed multichannel recording circuits, while Section 5 provides conclusions.

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Section: Low-power Low-area Techniques For Multichannel Recording Cirmentioning

confidence: 99%

“…The main IC parameters are very attractive for systems requiring recordings of different biomedical signals. The presented recording channel was compared to other works [27][28][29][30] in terms of its current consumption and area occupation.…”

Section: Low-power Low-area Techniques For Multichannel Recording Cirmentioning

confidence: 99%

Low-power low-area techniques for multichannel recording circuits dedicated to biomedical experiments

Kmon¹

2016

Bulletin of the Polish Academy of Sciences Technical Sciences

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“…The design of nanopower OTAs with enhanced linearity is presented in [41]. In the case of recording from a multielectrode array, the total power consumption of the amplifier array (as well as the silicon area) may be reduced by using the partial OTA sharing structure proposed in [42]. In this technique, each of the amplifiers in the array share the components corresponding to the reference electrode (i.e., pseudoresistors and and capacitors 1 and 2 connected to ref in the amplifier in Figure 6).…”

Section: Continuous-time Techniquesmentioning

confidence: 99%

Advances in Microelectronics for Implantable Medical Devices

Demosthenous

2014

Advances in Electronics

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Implantable medical devices provide therapy to treat numerous health conditions as well as monitoring and diagnosis. Over the years, the development of these devices has seen remarkable progress thanks to tremendous advances in microelectronics, electrode technology, packaging and signal processing techniques. Many of today's implantable devices use wireless technology to supply power and provide communication. There are many challenges when creating an implantable device. Issues such as reliable and fast bidirectional data communication, efficient power delivery to the implantable circuits, low noise and low power for the recording part of the system, and delivery of safe stimulation to avoid tissue and electrode damage are some of the challenges faced by the microelectronics circuit designer. This paper provides a review of advances in microelectronics over the last decade or so for implantable medical devices and systems. The focus is on neural recording and stimulation circuits suitable for fabrication in modern silicon process technologies and biotelemetry methods for power and data transfer, with particular emphasis on methods employing radio frequency inductive coupling. The paper concludes by highlighting some of the issues that will drive future research in the field.

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“…Large input transistors, source degeneration resistors [11,12], improved effective transconductance [12] and severe current scaling in the noninput branches [11] are the main approaches used to achieve noise reduction. Among commonly used topologies, the telescopic cascode offers the best noise-power trade-off due to the smaller number of current branches and transistors contributing to the overall noise [13]. Biasing the transistors in weak and moderate inversion rather than strong inversion results in relaxed headroom requirements and provides sufficient swing at the output of the telescopic amplifier.…”

Section: B Optimized Otamentioning

confidence: 99%

Design techniques and analysis of high-resolution neural recording systems targeting epilepsy focus localization

Shoaran¹,

Pollo²,

Leblebici³

et al. 2012

2012 Annual International Conference of the IEEE Engineering in Medicine and Biology Society

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Abstract-The design of a high-density neural recording system targeting epilepsy monitoring is presented. Circuit challenges and techniques are discussed to optimize the amplifier topology and the included OTA. A new platform supporting active recording devices targeting wireless and high-resolution focus localization in epilepsy diagnosis is also proposed. The post-layout simulation results of an amplifier dedicated to this application are presented. The amplifier is designed in a UMC 0.18µm CMOS technology, has an NEF of 2.19 and occupies a silicon area of 0.038 mm 2 , while consuming 5.8 µW from a 1.8-V supply.

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Energy Efficient Low-Noise Neural Recording Amplifier With Enhanced Noise Efficiency Factor

Cited by 145 publications

References 16 publications

Low-power low-area techniques for multichannel recording circuits dedicated to biomedical experiments

Low-power low-area techniques for multichannel recording circuits dedicated to biomedical experiments

Advances in Microelectronics for Implantable Medical Devices

Design techniques and analysis of high-resolution neural recording systems targeting epilepsy focus localization

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