Energy efficient analog to digital converter in 90nm CMOS

Abstract

Multi-electrode array devices are widely considered for sensing a large amount of neural data in implantable applications. In such systems power and area are playing most important roll in design and implementation. This paper presents a low power, variable bits and small area analog to digital converter (ADC) for biopotential and neural signals-recording applications. This work has been simulated in standard 90 nm 1P9M CMOS with sample rate of 1Ms/sec and variable precision of 7 to 12 bits. The standby (no input signal) power dissipation of the ADC is 500 nW and full-scale signal conversion is 7.8 ȝW from a single 1.2-V supply.