Energy and Error Analysis Framework for Approximate Computing in Mobile Applications

Jha, Chandan Kumar; Ved, Sneha N.; Anand, I; Mekie, Joycee

doi:10.1109/tcsii.2019.2910137

Cited by 11 publications

(5 citation statements)

References 14 publications

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“…LOA is an area and computation-efficient implementation of the adder among the various approximate adders in the literature ever found. Still, the research is progressed in the same approach for striving better accuracy [36][37][38][39]. Our work is unique in this; we hardly bother about accuracy since in this encryption domain adder is used for translation purpose.…”

Section: Proposed Renovated Xtea Mutual Authentication Protocol Archi...mentioning

confidence: 99%

Renovated XTEA Encoder Architecture-Based Lightweight Mutual Authentication Protocol for RFID and Green Wireless Sensor Network Applications

Nagarajan

Muthaiah

Teekaraman

et al. 2022

Wireless Communications and Mobile Computing

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Wireless sensor networks find applications everywhere in day to day activities right from attendance entry systems to healthcare monitoring systems. The evolution of the Internet of Things (IoT) as the Internet of Everything (IoET) makes the wireless sensor network omnipresent and increases the use of Radio Frequency Identification (RFID) for the proper identification of devices and sensor nodes which are mostly battery operated. As technology evolves, security threats also increase rapidly. This mandates a strong and energy-efficient green solution. This work attempted to address these issues by effectively deploying the lightweight encryption scheme called Extended Tiny Encryption Algorithm (XTEA). Though the XTEA is lightweight and famous, it is commonly known for various attacks. Our work patches the security threats in the XTEA by applying domain-specific customization, random number utilization, and undisclosed key renewal techniques. Two custom Renovated XTEA Mutual Authentication Protocol (RXMAP) encoder architectures, namely, RXMAP-1 and RXMAP-2, are proposed based on the replacement of accurate computational blocks with approximate blocks. The proposed RXMAP protocol is evaluated for its computational and storage overhead and verified against various security threats using BAN logic formal verification and informal verification. The proposed encoder architectures are simulated for functional verification, and ASIC implementation is done with a 132 nm process node. ASIC implementation results show that the proposed designs RXMAP-1 and RXMAP-2 occupy 53.11% and 53.31% lesser area compared to XTEA I and 52.97% and 53.18% lesser area compared to XTEA II implementation. The total power consumed by the proposed encoder architectures RXMAP-1 and RXMAP-2 is 68.76% and 71.64% lesser than XTEA II implementation, respectively, while maintaining the equal throughput.

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Section: Proposed Renovated Xtea Mutual Authentication Protocol Archi...mentioning

confidence: 99%

Renovated XTEA Encoder Architecture-Based Lightweight Mutual Authentication Protocol for RFID and Green Wireless Sensor Network Applications

Nagarajan

Muthaiah

Teekaraman

et al. 2022

Wireless Communications and Mobile Computing

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“…Since Sum and Carry can each be implemented in 256 ways, the total combinations available are 65 536 for the 1-bit full adder (one of these combinations is for the exact full adder). We designed the higher bit approximate adder using the 1-bit approximate adders by replacing the required number of exact adders with approximate adders [13], [26]. We implemented the approximate adder designs for the 8-, 12-, and 16-bit adders in Verilog as shown in Fig.…”

Section: A Approximate Adders Generationmentioning

confidence: 99%

IMAGIN: Library of IMPLY and MAGIC NOR-Based Approximate Adders for In-Memory Computing

Jha

Thangkhiew

Datta

et al. 2022

IEEE J. Explor. Solid-State Comput. Devices Circuits

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In-memory computing (IMC) has attracted significant interest in recent years as it aims to bridge the memory bottleneck in the Von Neumann architectures. IMC also improves the energy efficiency in these architectures. Another technique that has been explored to reduce the energy consumption is the use of approximate circuits, targeted toward error resilient applications. These applications have addition as one of their most frequently used operations. In literature, CMOS-based approximate adder libraries have been implemented to help designers choose from a variety of designs depending on the output quality requirements. However, the same is not true for memristor-based approximate adders targeted for IMC architectures. Hence, in this work, we developed a framework to generate approximate adder designs with varying output errors for the 8-, 12-, and 16-bit adders. We implemented a state-of-the-art scheduling algorithm to obtain the best mapping of these approximate adder designs for IMC. We performed an exhaustive design space exploration to obtain the pareto-optimal approximate adder designs for various design and error metrics. We then proposed IMAGIN, a library of approximate adders compatible with the memristor-based IMC architecture, which are based on the IMPLY and MAGIC design styles. We also performed mean filtering on the Kodak image dataset using the approximate adders from the IMAGIN library. IMAGIN can help designers select from a wide variety of approximate adders depending on the output quality requirements and serve as benchmarks for future research in this direction. All pareto-optimal designs will be made available at https://github.com/agra-uni-bremen/JxCDC2022-imagin-add.

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“…The language is an extension of the Skill language used to control Analog simulation. The flow automatically performs parametric simulations of each logic cell and generates output parameters with the format as the liberty file [15]. Regarding the Wire-Load Model (WLM), this paper proposed a method and used accuracy formulas to design a complete model.…”

Section: Introductionmentioning

confidence: 99%

A Novel Approach to Design a Process Design Kit Digital for CMOS 180nm Technology

Cong¹,

Le-Thanh²,

Bao³

et al. 2021

Adv. sci. technol. eng. syst. j.

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In this paper, a novel approach to design a Process Design Kit Digital for CMOS 180nm process is presented. This work proposes a detailed flow to design a PDK Digital using Ocean language, which is a vital element in the semi-custom design and applied in education purposes in universities in Vietnam. The PDK digital includes Standard Cell Library containing 47 standard cells and Wire-Load Model. The library is designed based on the CMOS 180nm process with a supply voltage of 1.8V.

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Energy and Error Analysis Framework for Approximate Computing in Mobile Applications

Cited by 11 publications

References 14 publications

Renovated XTEA Encoder Architecture-Based Lightweight Mutual Authentication Protocol for RFID and Green Wireless Sensor Network Applications

Renovated XTEA Encoder Architecture-Based Lightweight Mutual Authentication Protocol for RFID and Green Wireless Sensor Network Applications

IMAGIN: Library of IMPLY and MAGIC NOR-Based Approximate Adders for In-Memory Computing

A Novel Approach to Design a Process Design Kit Digital for CMOS 180nm Technology

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