Energy and Delay Improvement via Decimal Floating Point Units

Decimal Floating Point Number System

“…We will focus our attention here on designs using the conventional paradigm of CMOS digital gates although some alternative technologies [8,9] were also considered for decimal circuits at different points in time. Commercial hardware designs for decimal floating point additions were pioneered by IBM [10][11][12], followed by SilMinds [6,[13][14][15], then Fujitsu [16]. All of these commercial implementations use DPD.…”

“…Such services may obviously be rendered via a software layer on top of regular binary processors. However, dedicated decimal hardware consumes less energy [6].…”

“…By the early years of the twenty-first century [4] the need for decimal hardware resurfaced due to the vast difference between the speed and energy consumption of a software versus a hardware solution [6]. Furthermore, the different software implementations were not all compatible.…”

Algorithm and architecture for on-line decimal powering computation

“…After iteration j = k the values of log 10 (1+e j 10 −j ) can be approximated by (10) . The selection of the k value depends on achieving the constraint e 2 j 10 −2j 2ln(10) < 10 −n , where n is the required accurate precision to be calculated.…”

“…According to the series expansion of logarithm function in (10), Since the value of log(1 + x) is approximatd by x ln (10) after the k th iteration. Putting x = e j 10 −j , this produces an approximation error, ε a :…”