Employing classification-based algorithms for general-purpose approximate computing

Oliveira, Geraldo F.; Goncalves, Larissa Rozales; Brandalero, Marcelo; Beck, Antonio Carlos Schneider; Carro, Luigi

doi:10.1145/3195970.3196043

Cited by 8 publications

(7 citation statements)

References 21 publications

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“…Decision tree algorithms are a popular class of machine learning algorithm and have been deployed in many real scenarios [1]- [3], especially when multiple decision trees are combined into powerful ensemble models, such as XG-Boost [4] and random forests [5]. Recently, the ensemble of decision trees as deep forests [6] has been reported to produce comparable performance compared to deep neural networks.…”

Section: Introductionmentioning

confidence: 99%

Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA

Lin

Sinha

Zhang

2019

2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)

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Decision trees are machine learning models commonly used in various application scenarios. In the era of big data, traditional decision tree induction algorithms are not suitable for learning large-scale datasets due to their stringent data storage requirement. Online decision tree learning algorithms have been devised to tackle this problem by concurrently training with incoming samples and providing inference results. However, even the most up-to-date online tree learning algorithms still suffer from either high memory usage or high computational intensity with dependency and long latency, making them challenging to implement in hardware. To overcome these difficulties, we introduce a new quantile-based algorithm to improve the induction of the Hoeffding tree, one of the state-of-the-art online learning models. The proposed algorithm is lightweight in terms of both memory and computational demand, while still maintaining high generalization ability. A series of optimization techniques dedicated to the proposed algorithm have been investigated from the hardware perspective, including coarse-grained and finegrained parallelism, dynamic and memory-based resource sharing, pipelining with data forwarding. We further present a highperformance, hardware-efficient and scalable online decision tree learning system on a field-programmable gate array (FPGA) with system-level optimization techniques. Experimental results show that our proposed algorithm outperforms the state-of-theart Hoeffding tree learning method, leading to 0.05% to 12.3% improvement in inference accuracy. Real implementation of the complete learning system on the FPGA demonstrates a 384× to 1581× speedup in execution time over the state-of-the-art design.

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Section: Introductionmentioning

confidence: 99%

Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA

Lin

Sinha

Zhang

2019

2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)

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“…They also considered a software implementation, but observed a prohibitive increase in instruction count for software execution compared to a baseline x86 function. Later work by Oliveira et al [94] found that function approximation using a simple classification tree can achieve comparable results to NPU [90] for application speedup and error rate in several applications (albeit somewhat worse on average). Their purely software implementation highlights a trade-off between area/power and accuracy/performance.…”

Section: Online ML Applicationmentioning

confidence: 98%

“…ML classifiers predict individual approximation error, allowing comparison to a quality threshold. Recent work by Oliveira et al [94] also explored approximation using low-overhead classification trees. Even with software-based execution, they achieved comparable to an NPU [90] hardware implementation.…”

Section: Ml-enabled Approximate Computingmentioning

confidence: 99%

“…This certainly does not mean that RL is a one-modelfits-all solution. Supervised learning models find strong application in function approximation [90], [91], [92], [94] and branch prediction tasks [41], [42], which are far less suitable (if not impossible) to approach using RL since these tasks cannot be represented well as a sequence of actions.…”

Section: Online ML Applicationmentioning

confidence: 99%

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A Survey of Machine Learning Applied to Computer Architecture Design

Penney¹,

Chen

2019

Preprint

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Machine learning has enabled significant benefits in diverse fields, but, with a few exceptions, has had limited impact on computer architecture. Recent work, however, has explored broader applicability for design, optimization, and simulation. Notably, machine learning based strategies often surpass prior state-of-the-art analytical, heuristic, and human-expert approaches. This paper reviews machine learning applied system-wide to simulation and run-time optimization, and in many individual components, including memory systems, branch predictors, networks-on-chip, and GPUs. The paper further analyzes current practice to highlight useful design strategies and identify areas for future work, based on optimized implementation strategies, opportune extensions to existing work, and ambitious long term possibilities. Taken together, these strategies and techniques present a promising future for increasingly automated architectural design.

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“…This is also the first work that provides an extensive open-source benchmark suite, with a diverse range of real world applications, tailored to stress different memory-related data movement bottlenecks in a system. Many past works investigate how to reduce data movement cost using a range of different compute-centric (e.g., prefetchers [56,189,244,349]- [369], speculative execution [57,58,183,184,349,370], value-prediction [349,356,371]- [387], data compression [388]- [405], approximate computing [40,371,406,407]) and memory-centric techniques [ [417]. These works evaluate the impact of data movement in different systems, including mobile systems [1,39,418]- [420], data centers [5,31,355,421]- [425], accelerators-based systems [1,59,60,179,220,423,426], and desktop computers [202,427,428].…”

Section: Related Workmentioning

confidence: 99%

DAMOV: A New Methodology and Benchmark Suite for Evaluating Data Movement Bottlenecks

Oliveira¹,

Gómez-Luna

Orosa

et al. 2021

IEEE Access

Self Cite

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Data movement between the CPU and main memory is a first-order obstacle against improving performance, scalability, and energy efficiency in modern systems. Computer systems employ a range of techniques to reduce overheads tied to data movement, spanning from traditional mechanisms (e.g., deep multi-level cache hierarchies, aggressive hardware prefetchers) to emerging techniques such as Near-Data Processing (NDP), where some computation is moved close to memory. Prior NDP works investigate the root causes of data movement bottlenecks using different profiling methodologies and tools. However, there is still a lack of understanding about the key metrics that can identify different data movement bottlenecks and their relation to traditional and emerging data movement mitigation mechanisms. Our goal is to methodically identify potential sources of data movement over a broad set of applications and to comprehensively compare traditional compute-centric data movement mitigation techniques (e.g., caching and prefetching) to more memory-centric techniques (e.g., NDP), thereby developing a rigorous understanding of the best techniques to mitigate each source of data movement. With this goal in mind, we perform the first large-scale characterization of a wide variety of applications, across a wide range of application domains, to identify fundamental program properties that lead to data movement to/from main memory. We develop the first systematic methodology to classify applications based on the sources contributing to data movement bottlenecks. From our large-scale characterization of 77K functions across 345 applications, we select 144 functions to form the first open-source benchmark suite (DAMOV) for main memory data movement studies. We select a diverse range of functions that (1) represent different types of data movement bottlenecks, and (2) come from a wide range of application domains. Using NDP as a case study, we identify new insights about the different data movement bottlenecks and use these insights to determine the most suitable data movement mitigation mechanism for a particular application. We open-source DAMOV and the complete source code for our new characterization methodology at https: //github.com/CMU-SAFARI/DAMOV.

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Employing classification-based algorithms for general-purpose approximate computing

Cited by 8 publications

References 21 publications

Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA

Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA

A Survey of Machine Learning Applied to Computer Architecture Design

DAMOV: A New Methodology and Benchmark Suite for Evaluating Data Movement Bottlenecks

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