Embedding of Thinned RF Chips and Electrical Redistribution Layer Characterization

Yin, Rong; Nieweglowski, Krzysztof; Meier, Karsten; Bock, Karlheinz

doi:10.1109/eptc56328.2022.10013121

Cited by 2 publications

(1 citation statement)

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“…Next, the sample is ready for further flexible embedding and metallization processes. In [24] the DC characterization for the proposed RDL structures is presented. Recent simulation results demonstrate that embedding in the neutral bending plane of a flexible system further reduces the mechanical stress on the chip effectively [25].…”

Section: A Chip Embedding and Thinning Processmentioning

confidence: 99%

Characterization of Embedded and Thinned RF Chips

Yin,

Morath,

Hoyer

et al. 2024

IMAPSource Proceedings

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This work studies the effect of thinning down chips with transmission line structures for flexible embedding technology. Test chips with 90 Ω grounded coplanar waveguide (GCPW) transmission lines have been designed and manufactured to characterize the high-frequency performance before and after embedding in sheet molding compound (SMC), and thinning down from 300 μm to 20 μm. Molding first technology enables single-die or multiple-die thinning with the embedding material while being held in the exact position, where the subsequent fanout copper (Cu) redistribution layer (RDL) structuring realizes the direct contacts to the embedded chip, followed by semiadditive manufacturing of traces. The embedded and thinned chips are characterized by S-parameter measurements in the frequency range from 20 MHz to 65 GHz using a vector network analyzer (VNA). The results show the feasibility of the examined embedding and thinning processes which are suitable for millimeter wave (mmWave) components as shown by the example of a G-CPW transmission line without degrading its RF performance in terms of characteristic impedance and attenuation.

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Section: A Chip Embedding and Thinning Processmentioning

confidence: 99%