2013
DOI: 10.3788/yjyxs20132803.0459
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Embedded Color Image Enhancement System Based on DSP and FPGA

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“…Fig. 2 Filter module principle Adaptive algorithm module.Adaptive algorithms can be divided into two steps and dynamic Laplacian sharpening function reference table plate 1, when the neighbor pixels with the same gray level, the convolution operation result is 0, When the neighborhood of the center pixel intensity is higher than the other pixels in the average gray areas within it, the module convolution result is positive, when the center pixel is less than the gradation in the neighborhood of it in the other areas of the pixel when the average gray level, the convolution operation result is negative,When the result of the convolution with the appropriate attenuation factor applied to the original process and the center pixel, image sharpening can be realized [1]; FPGA to implement dynamic adjustment function, the pre-configured scene, Use FPGA ROM lookup table design, Grayscale initial data as an address,remove the lookup table as the gradation value conversion enhancement algorithm after completion, A lookup table to reduce consumption while increasing processing speed [5].…”
Section: Fpga Design and Verificationmentioning
confidence: 99%
“…Fig. 2 Filter module principle Adaptive algorithm module.Adaptive algorithms can be divided into two steps and dynamic Laplacian sharpening function reference table plate 1, when the neighbor pixels with the same gray level, the convolution operation result is 0, When the neighborhood of the center pixel intensity is higher than the other pixels in the average gray areas within it, the module convolution result is positive, when the center pixel is less than the gradation in the neighborhood of it in the other areas of the pixel when the average gray level, the convolution operation result is negative,When the result of the convolution with the appropriate attenuation factor applied to the original process and the center pixel, image sharpening can be realized [1]; FPGA to implement dynamic adjustment function, the pre-configured scene, Use FPGA ROM lookup table design, Grayscale initial data as an address,remove the lookup table as the gradation value conversion enhancement algorithm after completion, A lookup table to reduce consumption while increasing processing speed [5].…”
Section: Fpga Design and Verificationmentioning
confidence: 99%