Electronic structure of monolayer and double-layer Ge on Si(001)

Yeom, Han Woong; Kim, J. W.; Tono, Kensuke; Matsuda, Iwao; Ohta, Toshiaki

doi:10.1103/physrevb.67.085310

Cited by 8 publications

(5 citation statements)

References 35 publications

(27 reference statements)

Supporting

Mentioning

Contrasting

Order By: Relevance

“…16 Similar behaviors have also been reported by various groups for the Si͑001͒ surfaces. [17][18][19] Following, we would like to discuss the electrical results of epitaxial Gd 2 O 3 grown on various Si substrates. Figure 3͑a͒ compares the C-V characteristics of Pt/ Gd 2 O 3 / Si capacitors fabricated on Si͑001͒-͑2 ϫ 1͒ substrates with ͑1.5 ML͒ and without Ge coverage.…”

Section: Effect Of Ge Passivation On Interfacial Properties Of Crystamentioning

confidence: 99%

Effect of Ge passivation on interfacial properties of crystalline Gd2O3 thin films grown on Si substrates

Laha

Fissel

Osten

2010

Applied Physics Letters

View full text Add to dashboard Cite

The incorporation of few monolayers of Ge chemisorbed on Si surface has been found to have significant impact on the electrical properties of crystalline Gd2O3 grown epitaxially on Si substrates. Although the Ge coverage on Si surface does not show any influence on the epitaxial quality of Gd2O3 layers, however, it exhibits a strong impact on their electrical properties. We show that by incorporating few monolayers of Ge at the interface between Gd2O3 and Si, the capacitance-voltage characteristics, fixed charge and density of interface traps of Pt/Gd2O3/Si capacitor are much superior to those layers grown on clean Si surfaces.

show abstract

Section: Effect Of Ge Passivation On Interfacial Properties Of Crystamentioning

confidence: 99%

Effect of Ge passivation on interfacial properties of crystalline Gd2O3 thin films grown on Si substrates

Laha

Fissel

Osten

2010

Applied Physics Letters

View full text Add to dashboard Cite

show abstract

“…In this paper, we discuss how such simulations are performed, including elementary events such as deposition, as well as adatom and ad-dimer diffusion and taking into account the known anisotropy produced by the reconstruction of the Si (100) surface [4]. Importantly, studies [5][6][7] have also indicated that there is intermixing in the layers adjacent to the interface so that the Si-Ge interface. We have also included two inter-mixing mechanisms to account for this.…”

Section: Introductionmentioning

confidence: 99%

Kinetic Monte-Carlo simulations of germanium epitaxial growth on silicon

Akis

Ferry

2006

J Comput Electron

View full text Add to dashboard Cite

We present Kinetic Lattice Monte Carlo (KLMC) simulations of Ge deposition onto a reconstructed Si (100) surface. In addition to the anisotropy brought on by surface reconstruction, we take into account the role of the exchange of Ge with Si atoms in the substrate and how it effects the interface between the materials. One method of controlling the resulting structures from the growth process is to use a pre-patterned substrate. We present results where the initial structure is a grid pattern. The KLMC simulations in this case yield Ge-Si stripes, that result largely from the anisotropy generated from the surface reconstruction.

show abstract

“…The similar bias voltage-dependent change was reasonable, because Ge/Si(001) and Si(001) have nearly the same surface electronic structure [9]. The bias voltagedependent change suggests that the spatial distribution of the 1D D p down state on the dimer chains will be reflected on the STM images taken at V t , 1:4 eV at the Ge/Si(001) wetting layer surfaces.…”

Section: Resultsmentioning

confidence: 59%

“…Theoretical studies have indicated that an unoccupied electronic level on the down dimer atoms delocalized fully on the dimer row to become a free-electron like, one-dimensional (1D) empty state (called the D p down state) at Si and Ge(001) surfaces [7,8]. Since the Ge/Si(001) wetting layer has an electronic structure similar to that of the Si(001) surface [9], the free-electron like D p down 1D-state is expected to appear on the dimer rows at the Ge/Si(001) wetting layer surfaces. However, the dimer rows were partitioned by dimer vacancy lines (DVLs), which consist of dimer vacancies aligned perpendicular to dimer rows, at the Ge/Si(001) surfaces.…”

Section: Introductionmentioning

confidence: 99%

Confinement of one-dimensional electrons in dimer row segments at Ge/Si(001) surfaces

Hirayama

2004

Science and Technology of Advanced Materials

View full text Add to dashboard Cite

During the initial growth, Si(001) surfaces were covered by thin Ge wetting layers. At the wetting layer surfaces, Ge atoms were reconstructed into dimers, which were aligned along the [110] direction to form one-dimensional (1D) 'dimer rows'. In addition, the dimer rows were partitioned by dimer vacancy lines at the Ge/Si(001) surfaces. As a result, the surfaces were covered spontaneously by an array of 1D dimer row segments. Scanning tunneling microscope images demonstrated that the 1D free-electrons in the dimer rows are confined in each segment and form an ultra-high density array of 1D quantum wells at the surfaces. q

show abstract

Electronic structure of monolayer and double-layer Ge on Si(001)

Cited by 8 publications

References 35 publications

Effect of Ge passivation on interfacial properties of crystalline Gd2O3 thin films grown on Si substrates

Effect of Ge passivation on interfacial properties of crystalline Gd2O3 thin films grown on Si substrates

Kinetic Monte-Carlo simulations of germanium epitaxial growth on silicon

Confinement of one-dimensional electrons in dimer row segments at Ge/Si(001) surfaces

Contact Info

Product

Resources

About