Electron Transport in Strained-Silicon Directly on Insulator Ultrathin-Body n-MOSFETs With Body Thickness Ranging From 2 to 25 nm

Gomez, L.; Åberg, Ingvar; Hoyt, Judy L.

doi:10.1109/led.2007.891795

Cited by 48 publications

(41 citation statements)

References 9 publications

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“…Together with the possibility of large-scale liquid-based processing of MoS 2 and related 2D materials, 17 our finding could open the way to using MoS 2 for applications in flexible electronics. Single-layer MoS 2 also has advantages over conventional silicon: it is thinner than state-of-the-art silicon films that are 2 nm thick 36 and has a smaller dielectric constant (ε = 7, ref 37) than silicon (ε = 11.9), implying that using single-layer MoS 2 could reduce short channel effects 26 and result in smaller and less powerhungry transistors than those based on silicon technology. Several difficulties however need to be solved before MoS 2 can become a mainstream electronic material for the semiconductor industry.…”

Section: Discussionmentioning

confidence: 99%

Integrated Circuits and Logic Operations Based on Single-Layer MoS₂

2011

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Logic circuits and the ability to amplify electrical signals form the functional backbone of electronics along with the possibility to integrate multiple elements on the same chip. The miniaturization of electronic circuits is expected to reach fundamental limits in the near future. Two-dimensional materials such as single-layer MoS2 represent the ultimate limit of miniaturization in the vertical dimension, are interesting as building blocks of low-power nanoelectronic devices, and are suitable for integration due to their planar geometry. Because they are less than 1 nm thin, 2D materials in transistors could also lead to reduced short channel effects and result in fabrication of smaller and more power-efficient transistors. Here, we report on the first integrated circuit based on a two-dimensional semiconductor MoS2. Our integrated circuits are capable of operating as inverters, converting logical “1” into logical “0”, with room-temperature voltage gain higher than 1, making them suitable for incorporation into digital circuits. We also show that electrical circuits composed of single-layer MoS2 transistors are capable of performing the NOR logic operation, the basis from which all logical operations and full digital functionality can be deduced.

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Section: Discussionmentioning

confidence: 99%

Integrated Circuits and Logic Operations Based on Single-Layer MoS₂

2011

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“…In such a ultrasmall thickness regime, the varying rate of mobility of 2D MoS 2 is relatively weaker than that of silicon, in which an extremely strong power-law (μ ~ t -6 ) dependence on channel thickness (t) dominates as t < 4 nm owing to the carrier scattering from surface roughness (SR). (15)(16)(17) Given the atomically sharp surfaces shown by the 2D MoS 2 , the SR scattering mechanism is obviously not the origin of the mobility degradation observed in the ultrathin 2D chalcogenides. The intriguing thickness dependence and performance degradation remain to be elucidated.…”

Section: Dependence Of Performance On Thicknessmentioning

confidence: 99%

“…Fourth, the atomic flatness makes them immune to surface-roughness-induced carrier scattering so that they can overcome the limitation of channel thickness confronted by Si FETs. (15)(16)(17) Extensive research attention has been devoted to 2D chalcogenides spanning from synthesis (18)(19)(20)(21)(22)(23)(24) and characterization (25,26) to electrical, (27)(28)(29)(30)(31)(32)(33) optoelectronic (34)(35)(36) and photovoltaic (37)(38)(39)(40)(41) applications, and further to novel valley physics (42)(43)(44)(45)(46)(47)(48) and nonlinear optics. (49,50) At present, reviews of various topics are available.…”

Section: Introductionmentioning

confidence: 99%

Carrier Injection and Scattering in Atomically Thin Chalcogenides

Tsukagoshi

2015

J. Phys. Soc. Jpn.

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Atomically thin two-dimensional chalcogenides such as MoS 2 monolayers are structurally ideal channel materials for the ultimate atomic electronics. However, a heavy thickness dependence of electrical performance is shown in these ultrathin materials, and the device performance normally degrades while exhibiting a low carrier mobility as compared with corresponding bulks, constituting a main hurdle for application in electronics. In this brief review, we summarize our recent work on electrode/channel contacts and carrier scattering mechanisms to address the origins of this adverse thickness dependence.Extrinsically, the Schottky barrier height increases at the electrode/channel contact area in thin channels owing to bandgap expansion caused by quantum confinement, which hinders carrier injection and degrades device performance.Intrinsically, thin channels tend to suffer from intensified Coulomb impurity scattering, resulting from the reduced interaction distance between interfacial impurities and channel carriers. Both factors are responsible for the adverse dependence of carrier mobility on channel thickness in two-dimensional semiconductors.

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mentioning

confidence: 99%

“…However, the operation of Si-MOSFET with an atomic scale thickness is not realistic because the mobility is drastically reduced because of fabrication damage. 5,6 The advantage of 2D materials is their intrinsic atomic thickness, 7,8 which allows both the reduction of the short channel effect and the possible retention of high mobility. For the short channel devices in which quasiballistic transport is assumed, the on-current can be determined not by the mobility but by the effective mass.…”

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confidence: 99%

Graphene field-effect transistor application-electric band structure of graphene in transistor structure extracted from quantum capacitance

Nagashio

2016

J. Mater. Res.

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Recently, various two-dimensional (2D) materials, such as graphene, transition metal dichalcogenides and so on, have attracted much attention in electron device research. The most important characteristic of graphene is its highest mobility of all semiconductor channels at room temperature. However, it is obvious that more than a good mobility characteristic is required to realize the field effect transistor (FET), and intense arguments from various points of view are necessary. In this paper, the issues with Si-metal oxide semiconductor FETs (Si-MOSFET) and the advantage of 2D materials are discussed. The present state of graphene FETs with respect to gate stack formation and band gap engineering is reported. Moreover, based on the density of states (DOS) of graphene extracted using the quantum capacitance (C Q ) measurement, it is shown that the electric band structure of graphene in contact with gate insulators or metal electrode deviates from its intrinsic band structure. I. ISSUES WITH Si-MOSFET AND THE ADVANTAGE OF 2D CHANNELSThe issues with the miniaturization of Si-MOSFETs are generically called short channel effects.1 When the source and drain depletion regions become comparable in length with the channel length, as shown in Fig. 1(a), the drain bias weakens the gate bias, which leads to a drastic increase in the off-current. Based on an analysis of the distribution of the electrical potential in the channel region, it is widely known that the short channel effect can be neglected when the channel length is ;6 times longer than the scaling length, k ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi ffi e ch t ch t ox ð Þ = Ne ox ð Þ p , 2,3 where e ch , e ox , t ch , and t ox are the dielectric constants for the channel, the gate insulator, the thickness of the channel, and the gate oxide, respectively. Figure 1(b) shows the 6k values calculated for Si, carbon nanotubes (CNT), bilayer graphene, and MoS 2 , where the contribution of the tunneling effect is neglected. N is defined as the effective gate number: N 5 1 for planar, N 5 2 for dual gate, N 5 3 for FIN-FET, and N 5 4 for gate-all-around. Although the FIN structure has already been adopted for Si to reduce the short channel effects, 4 it is difficult to avoid the short channel effects for channel lengths shorter than 10 nm. 2D layered channels in FET applications are attractive because of their rigidly controllable atomic thickness (t ch , 1 nm) and their low dielectric constants where e ch 5 ;4 for a typical 2D layered channel. 3,4 This results in a 6k smaller than that of Si. Of course, Si channels of a few nanometers thick have already been constructed using the microfabrication process. However, the operation of Si-MOSFET with an atomic scale thickness is not realistic because the mobility is drastically reduced because of fabrication damage. 5,6 The advantage of 2D materials is their intrinsic atomic thickness, 7,8 which allows both the reduction of the short channel effect and

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Electron Transport in Strained-Silicon Directly on Insulator Ultrathin-Body n-MOSFETs With Body Thickness Ranging From 2 to 25 nm

Cited by 48 publications

References 9 publications

Integrated Circuits and Logic Operations Based on Single-Layer MoS₂

Integrated Circuits and Logic Operations Based on Single-Layer MoS₂

Carrier Injection and Scattering in Atomically Thin Chalcogenides

Graphene field-effect transistor application-electric band structure of graphene in transistor structure extracted from quantum capacitance

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Electron Transport in Strained-Silicon Directly on Insulator Ultrathin-Body n-MOSFETs With Body Thickness Ranging From 2 to 25 nm

Cited by 48 publications

References 9 publications

Integrated Circuits and Logic Operations Based on Single-Layer MoS2

Integrated Circuits and Logic Operations Based on Single-Layer MoS2

Carrier Injection and Scattering in Atomically Thin Chalcogenides

Graphene field-effect transistor application-electric band structure of graphene in transistor structure extracted from quantum capacitance

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Product

Resources

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Integrated Circuits and Logic Operations Based on Single-Layer MoS₂

Integrated Circuits and Logic Operations Based on Single-Layer MoS₂