Electron cyclotron resonance plasma process for InP passivation

Hu, Y. Z.; Li, M.; Wang, Y.; Irene, E. A.; Rowe, M. W.; Casey, H. C.

doi:10.1063/1.109797

Cited by 19 publications

(5 citation statements)

References 11 publications

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“…2b shows the effect of the solvent ͑MeOH, EtOH, i-PA, H 2 O͒ on the effectiveness of native oxide removal and enhancement in the quality of the surface; the higher ͗ 2 ͘ spectrum and hence, the better surface is obtained using MeOH. The present results are consistent with the findings of Hu et al 33 on HF:MeOH ͑1:10͒ treatment for InP native oxide removal.…”

Section: Resultssupporting

confidence: 94%

InAs(100) Surfaces Cleaning by an As-Free Low-Temperature 100°C Treatment

Losurdo

Giangregorio

Lisco

et al. 2009

J. Electrochem. Soc.

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Oxide removal from InAs(100) surfaces was achieved using a combination of HF:methanol wet etching followed by atomic hydrogen treatment at a temperature as low as 100°C without any stabilizing As flux. The process was monitored in real-time exploiting spectroscopic ellipsometry. Following this treatment, the surface morphology was found to be very smooth at the nanometer scale, with a reduced effective oxide thickness and no appreciable levels of elemental In and As. Furthermore, we demonstrate stability of such surfaces against oxide reformation.

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Section: Resultssupporting

confidence: 94%

InAs(100) Surfaces Cleaning by an As-Free Low-Temperature 100°C Treatment

Losurdo

Giangregorio

Lisco

et al. 2009

J. Electrochem. Soc.

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“…The poor electrical quality of native oxides has forced researchers to develop novel methods of surface passivation [1][2][3] and new techniques to deposit dielectric films without damaging the underlying substrate. [4][5][6] We have previously demonstrated that the electronic properties of metal-insulator-semiconductor (MIS) devices on InP can be improved markedly by the chemical bath deposition of CdS on the substrate prior to dielectric deposition. 7 More recently, we have fabricated MIS capacitors with near-ideal capacitance-voltage (C-V) response on InP(100) by modifying the CdS deposition process to include a pretreatment in an aqueous thiourea/ammonia solution.…”

mentioning

confidence: 99%

Optimization of Chemical Bath‐Deposited Cadmium Sulfide on InP Using a Novel Sulfur Pretreatment

Davis

Vaccaro

Dauplaise

et al. 1999

J. Electrochem. Soc.

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A high density of electrically active interface states has hindered the development of InP-based insulated-gate technology. The poor electrical quality of native oxides has forced researchers to develop novel methods of surface passivation 1-3 and new techniques to deposit dielectric films without damaging the underlying substrate. [4][5][6] We have previously demonstrated that the electronic properties of metal-insulator-semiconductor (MIS) devices on InP can be improved markedly by the chemical bath deposition of CdS on the substrate prior to dielectric deposition. 7 More recently, we have fabricated MIS capacitors with near-ideal capacitance-voltage (C-V) response on InP(100) by modifying the CdS deposition process to include a pretreatment in an aqueous thiourea/ammonia solution. 8 The CdS passivation process, including pretreatment, has been shown to remove InP native oxides and prevent subsequent reoxidation of the InP upon exposure to air. While this passivation technique has proven effective on InP, as well as InGaAs, the high ammonia concentration and consequent high pH may lead to chemical incompatibilities when applied to aluminumcontaining compounds such as InAlAs, AlGaAs, and InAlGaAs that are prevalent in contemporary optoelectronic devices. In this study we varied the concentrations of ammonia and cadmium sulfate in our CdS depositions. X-ray photoelectron spectroscopy (XPS) was used to examine the thermal stability of the S-passivated InP surface and CdS thin films. Film microstructure was studied by reflection high-energy electron-diffraction (RHEED) and atomic force microscopy (AFM). MIS capacitors were fabricated from CdS-passivated InP. Quasi-static and 1 MHz C-V measurements were used to determine the density of electrically active states in the SiO 2 /CdS/InP interface region. Experimental Sample preparation.-All substrates were undoped (n Ϸ 5 ϫ 10 15 cm Ϫ3 ) InP(100) manufactured by Sumitomo. Stock solutions of 14.5 M ammonia, 0.2 M thiourea, and 0.1 M cadmium sulfate were prepared from VLSI grade ammonium hydroxide, 99% thiourea [CS(NH 2 ) 2 ], and 99.999% cadmium sulfate (3CdSO 4 и8H 2 O), respectively. Thiourea/ammonia pretreatment is performed by taking n-InP substrates directly from the manufacturer's box and immersing them in a 0.033 M thiourea and 12.1 M ammonia solution. The reaction beaker is placed in an 85ЊC water bath, which is used for temperature stability. Timing begins when the solution is placed in the water bath, not when it reaches equilibrium temperature. After 15 min in the 85ЊC bath, the samples are transferred directly to a room-temperature solution of thiourea and ammonia to which the appropriate amount of cadmium sulfate is then added. This CdS deposition solution is then heated in the water bath. The deposition solution and water bath reach an equilibrium temperature within 2 min. Deposition was followed by rinsing in deionized water and then drying with nitrogen.Deposition solutions with the concentrations used are listed in Table I; the pH values were measured wi...

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“…Previously, we have used in situ spectroscopic ellipsometry ͑SE͒ to establish models for Si and Ge oxidation, 8,9,16 -18 and single wavelength ellipsometry ͑SWE͒ to follow processes in real time, [19][20][21] and both SE and SWE are similarly used in this study.…”

Section: Introductionmentioning

confidence: 99%

In situ investigation of the passivation of Si and Ge by electron cyclotron resonance plasma enhanced chemical vapor deposition of SiO2

Wang

Irene

1996

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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In situ real time single wavelength ellipsometry and spectroscopic ellipsometry were used to monitor electron cyclotron resonance plasma enhanced chemical vapor deposition of SiO2 on Si and Ge at substrate temperatures from floating temperature (<50 °C) to 400 °C. Dielectric layers were evaluated by capacitance–voltage measurements. Single wavelength ellipsometry and x-ray photoelectron spectroscopy results show that oxidation occurred along with SiO2 deposition at the initial stage of plasma enhanced chemical vapor deposition. The real time oxidation analysis shows that the subcutaneous oxidation follows parabolic growth kinetics during SiO2 deposition. The parabolic rate coefficient is proportional to the voltage drop across the subcutaneous oxide layer, and yields temperature activated transport. The subcutaneous oxidation of Ge yields a Ge rich oxide that degrades the electrical properties of metal–oxide capacitors. A thin Si layer deposited at room temperature before SiO2 deposition protects the Ge surface from undesirable oxidation during SiO2 deposition. The required thickness of Si layer is predicted. Electron cyclotron resonance plasma oxidation at 400 °C after SiO2 deposition reduces the slow trap states. An Al/SiO2/Si/Ge structure shows improved electrical properties of metal–oxide Ge capacitors. For c-Si substrates, a rapid thermal anneal of the deposited SiO2 in high vacuum can effectively eliminate the OH group incorporation, and thus reduces both interface trapped charge and slow trap states.

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Electron cyclotron resonance plasma process for InP passivation

Cited by 19 publications

References 11 publications

InAs(100) Surfaces Cleaning by an As-Free Low-Temperature 100°C Treatment

InAs(100) Surfaces Cleaning by an As-Free Low-Temperature 100°C Treatment

Optimization of Chemical Bath‐Deposited Cadmium Sulfide on InP Using a Novel Sulfur Pretreatment

In situ investigation of the passivation of Si and Ge by electron cyclotron resonance plasma enhanced chemical vapor deposition of SiO2

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