Optimization of Chemical Bath‐Deposited Cadmium Sulfide on InP Using a Novel Sulfur Pretreatment

Abstract

A high density of electrically active interface states has hindered the development of InP-based insulated-gate technology. The poor electrical quality of native oxides has forced researchers to develop novel methods of surface passivation 1-3 and new techniques to deposit dielectric films without damaging the underlying substrate. [4][5][6] We have previously demonstrated that the electronic properties of metal-insulator-semiconductor (MIS) devices on InP can be improved markedly by the chemical bath deposition of CdS on the substrate prior to dielectric deposition. 7 More recently, we have fabricated MIS capacitors with near-ideal capacitance-voltage (C-V) response on InP(100) by modifying the CdS deposition process to include a pretreatment in an aqueous thiourea/ammonia solution. 8 The CdS passivation process, including pretreatment, has been shown to remove InP native oxides and prevent subsequent reoxidation of the InP upon exposure to air. While this passivation technique has proven effective on InP, as well as InGaAs, the high ammonia concentration and consequent high pH may lead to chemical incompatibilities when applied to aluminumcontaining compounds such as InAlAs, AlGaAs, and InAlGaAs that are prevalent in contemporary optoelectronic devices. In this study we varied the concentrations of ammonia and cadmium sulfate in our CdS depositions. X-ray photoelectron spectroscopy (XPS) was used to examine the thermal stability of the S-passivated InP surface and CdS thin films. Film microstructure was studied by reflection high-energy electron-diffraction (RHEED) and atomic force microscopy (AFM). MIS capacitors were fabricated from CdS-passivated InP. Quasi-static and 1 MHz C-V measurements were used to determine the density of electrically active states in the SiO 2 /CdS/InP interface region. Experimental Sample preparation.-All substrates were undoped (n Ϸ 5 ϫ 10 15 cm Ϫ3 ) InP(100) manufactured by Sumitomo. Stock solutions of 14.5 M ammonia, 0.2 M thiourea, and 0.1 M cadmium sulfate were prepared from VLSI grade ammonium hydroxide, 99% thiourea [CS(NH 2 ) 2 ], and 99.999% cadmium sulfate (3CdSO 4 и8H 2 O), respectively. Thiourea/ammonia pretreatment is performed by taking n-InP substrates directly from the manufacturer's box and immersing them in a 0.033 M thiourea and 12.1 M ammonia solution. The reaction beaker is placed in an 85ЊC water bath, which is used for temperature stability. Timing begins when the solution is placed in the water bath, not when it reaches equilibrium temperature. After 15 min in the 85ЊC bath, the samples are transferred directly to a room-temperature solution of thiourea and ammonia to which the appropriate amount of cadmium sulfate is then added. This CdS deposition solution is then heated in the water bath. The deposition solution and water bath reach an equilibrium temperature within 2 min. Deposition was followed by rinsing in deionized water and then drying with nitrogen.Deposition solutions with the concentrations used are listed in Table I; the pH values were measured wi...

Influence of the electron buffer layer on the photovoltaic performance of planar Sb2(SxSe1‐x)3 solar cells

“…The most efficient solar cell was obtained under the optimum deposition time of 20 minutes (thickness, 20 nm). Above 20 minutes, higher CdS film thickness can cause an optical and interfacial barrier accelerating the charge recombination, as suggested by other studies …”

“…Figure 4A as suggested by other studies. 29,30 The best resulting J-V curves of planar Sb 2 (S x Se 1-x ) 3 13 In contrast, using c-TiO 2 produces a PCE max of 0.79% with J sc = 11.62 mA cm −2 and V oc = 0.22 V compared with that of c-CdS J sc = 16.82 mA cm −2 and V oc = 0.45 V (PCE max of 3.99%). By using a multilayer electron buffer, the thickness of CdS layer was reduced from 70 to 20 nm, compared with that reported in planar Sb 2 (S x Se 1-x ) 3 solar cells with similar photovoltaic performance, 14 which is a key factor in the fabrication of nontoxic solar cells.…”

Effect of Annealing Temperature on Structural, Optical and Electrical Properties of Pure CdS Thin Films Deposited by Spray Pyrolysis Technique

“…The structural and optical properties of SPD CdS thin films depend on the parameters of relative concentration of the reactants for chemical reaction, thickness of the films, pH value of the aqueous solution and annealing temperature. In the SPD process, film growth occurs either 1) by an ion-by-ion condensation or 2) by adsorption of the colloidal particles of CdS on the substrate [1,2]. The chemically deposited CdS film was found to consist of a continuous film relating to the ion-by-ion deposition of CdS [3,4].…”

Influence of Bath Temperature, Deposition Time and S/Cd Ratio on the Structure, Surface Morphology, Chemical Composition and Optical Properties of CdS Thin Films Elaborated by Chemical Bath Deposition

“…This is because CdS has high transparency, wide and direct band gap transition (2.42 eV), photoconductivity, high electron affinity and n-type conductivity. CdS can also be used in a lot of applications including electronic [2] and optoelectronic devices [3]. Undoped and doped CdS thin films have been reported using different methods: electrodeposition (ED) [4], spray pyrolysis (SP) [5], chemical bath deposition (CBD) [6], molecular beam epitaxy (MBE) [7], metal organic vapour phase epitaxy (MOVPE) [8], successive ionic layer adsorption and reaction (SILAR) [9], and physical vapour deposition (PVD) [10].…”