Electromagnetic Analysis Attack on an FPGA Implementation of an Elliptic Curve Cryptosystem

Mulder, Elke De; Buysschaert, P.; Örs, Berna; Delmotte, Peter; Preneel, Bart; Vandenbosch, Guy; Verbauwhede, Ingrid

doi:10.1109/eurcon.2005.1630348

Cited by 70 publications

(27 citation statements)

References 13 publications

(9 reference statements)

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“…On the other hand, typical forms of non-invasive attacks are side-channel attacks, which infer the secret information from the side-channel information generated while the data is being processed. The side-channel information commonly exploited are computation time [28], consumed power [29] and emitted electromagnetic radiation [30].…”

Section: Common Attacks To Fpga Based Ipsmentioning

confidence: 99%

Secure Licensing of IP Cores on SRAM-Based FPGAs

Zhang

Chang

2016

Secure System Design and Trustable Computing

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The rapid increase in FPGA devices' capacity has enabled the implementation of complete sophisticated systems. The widening design productivity gap and shrinking time-to-market window have made licensing of external IP cores for system development pervade. The upfront IP licensing model currently used in the market is not a good fit to the FPGA IP market as the blanket IP license fee is too expensive for the majority of FPGA-based system developers who target low-to-medium volume applications. This chapter presents a detailed discussion on secure licensing of the IP cores that is more suitable for FPGA IP market. After the background information such as the stakeholders in the market, common attacks to the IP cores and desiderata for an effective licensing scheme have been presented, two categories of IP licensing schemes, i.e., those that employ only the conventional crypto primitives and those that exploit the emerging PUF primitive, are detailed and illustrated. The shared target of these schemes is to realize a secure pay-per-use licensing model where the system developer is proportionally charged for the use of the IP core. Along with the discussion of the schemes, some noteworthy features are also highlighted such as the authenticity of the IP core as well as the fault tolerance, tamper and side-channel resistance of the employed hardware primitives. The aim of this chapter is to provide a comprehensive overview of existing developments in FPGA IP licensing protocols and facilitate the development of new schemes that are more efficient and costeffective.

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Section: Common Attacks To Fpga Based Ipsmentioning

confidence: 99%

Secure Licensing of IP Cores on SRAM-Based FPGAs

Zhang

Chang

2016

Secure System Design and Trustable Computing

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“…Unlike other embedded systems, we propose a system that will not store any sensitive information in the device; rather, flash memory is used to store the graphical password image chosen by the user and a unique set of true random numbers generated at the time of production. Since no sensitive information is stored in the device, there is no need for expensive hardware to guard against sidechannel attacks and other hardware cryptanalysis schemes [7][8][9]. Therefore, the graphical password must be used with the device every time an AES key or text password is needed.…”

Section: Introductionmentioning

confidence: 99%

Token-based graphical password authentication

Gyorffy

Tappenden

Miller

2011

Int. J. Inf. Secur.

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Given that phishing is an ever-increasing problem, a better authentication system is required. We propose a system that uses a graphical password deployed from a Trojan and virus-resistant embedded device. The graphical password utilizes a personal image to construct an image hash, which is provided as input into a cryptosystem that returns a password. The graphical password requires the user to select a small number of points on the image. The embedded device will then stretch these points into a long alphanumeric password. With one graphical password, the user can generate many passwords from their unique embedded device. The image hash algorithm employed by the device is demonstrated to produce random and unique 256-bit message digests and was found to be responsive to subtle changes in the underlying image. Furthermore, the device was found to generate passwords with entropy significantly larger than that of users passwords currently employed today.

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“…The use of Montgomery Scalar Multiplication computes point addition and doubling each time without depending on the value of each bit of scalar K. Therefore, it is secure against SPA attacks. For SEMA, though in [28] the authors indicated that this can also resist SEMA, we think it is too early to conclude that since in [17] the capability of multi-channel EMA attacks has not been comprehensively investigated. DPA/DEMA attacks [16,17] use statistical models to analyze multiple measurements.…”

Section: Security Analysis Of the Proposed Unified Countermeasurementioning

confidence: 99%

Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security

Guo

Fan

Schaumont

et al. 2009

Lecture Notes in Computer Science

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Abstract. Elliptic Curve Cryptography implementations are known to be vulnerable to various side-channel attacks and fault injection attacks, and many countermeasures have been proposed. However, selecting and integrating a set of countermeasures targeting multiple attacks into an ECC design is far from trivial. Security, performance and cost need to be considered together. In this paper, we describe a generic ECC coprocessor architecture, which is scalable and programmable. We demonstrate the coprocessor architecture with a set of countermeasures to address a collection of side-channel attacks and fault attacks. The programmable design of the coprocessor enables tradeoffs between area, speed, and security.

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Electromagnetic Analysis Attack on an FPGA Implementation of an Elliptic Curve Cryptosystem

Cited by 70 publications

References 13 publications

Secure Licensing of IP Cores on SRAM-Based FPGAs

Secure Licensing of IP Cores on SRAM-Based FPGAs

Token-based graphical password authentication

Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security

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