Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security

Abstract

Abstract. Elliptic Curve Cryptography implementations are known to be vulnerable to various side-channel attacks and fault injection attacks, and many countermeasures have been proposed. However, selecting and integrating a set of countermeasures targeting multiple attacks into an ECC design is far from trivial. Security, performance and cost need to be considered together. In this paper, we describe a generic ECC coprocessor architecture, which is scalable and programmable. We demonstrate the coprocessor architecture with a set of countermeasures to address a collection of side-channel attacks and fault attacks. The programmable design of the coprocessor enables tradeoffs between area, speed, and security.

State-of-the-art of secure ECC implementations: a survey on known side-channel attacks and countermeasures

“…• System integration of multiple countermeasures. In [42], the researchers suggested a combined countermeasure and discussed the system integration cost. A perfect countermeasure is probably useless if it is too complex to implement.…”

Scabbard: a suite of efficient learning with rounding key-encapsulation mechanisms

“…In fact, it is very common in the literature to focus on optimizing the polynomial multiplication exclusively when researching on accelerating lattice-based cryptography [ACC + 20, CHK + 20, KRS18, LS19, MKV20, MTK + 20]. Also there is a lot of precedence of outsourcing the most computationally expensive components to hardware accelerators in elliptic-curve or Rivest-Shamir-Adleman cryptography [GFSV09,LXJL11]. Lastly, with our implementations we also demonstrate that different trade-offs between area and performance in hardware implementations can be achieved by exploring the design space of the cryptographic scheme rather than by exploring different hardware architectures.…”

FPGA Based Crypto Processor for Elliptic Curve Point Multiplication (ECPM) Over GF(2233)

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