2014
DOI: 10.1002/pssr.201409146
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Electrical stability of multilayer MoS2 field-effect transistor under negative bias stress at various temperatures

Abstract: The electrical stability of molybdenum disulfide (MoS2) transistors is crucial for their use in various applications. However, it is tricky to evaluate the inherent stability of MoS2 transistors because it is highly dependent on environmental conditions during measurement such as humidity, light, and electrical factors. We studied the threshold voltage instability under negative bias stress at a variety of temperatures in a vacuum and in the dark to eliminate any environmental effects. In particular, the measu… Show more

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Cited by 44 publications
(42 citation statements)
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“…These defects severely degrade the reliability of 2D‐FETs and make them problematic for further integration. Charge exchange between oxide defects and trap states in the channel leads to the ubiquitous hysteresis and long‐term drifts of the gate transfer characteristics — often referred in Si technologies as bias‐temperature instabilities (BTI) . Recently, an attempt to improve the quality of comparably thin (10 nm) HfO 2 films has been undertaken by crystallizing them using rapid thermal annealing (RTA), but this methodology appears to be unsuitable to improve the performance of the devices due to the limited thermal stability of most TMDs.…”
Section: Effect Of the Dielectric Environmentmentioning
confidence: 99%
“…These defects severely degrade the reliability of 2D‐FETs and make them problematic for further integration. Charge exchange between oxide defects and trap states in the channel leads to the ubiquitous hysteresis and long‐term drifts of the gate transfer characteristics — often referred in Si technologies as bias‐temperature instabilities (BTI) . Recently, an attempt to improve the quality of comparably thin (10 nm) HfO 2 films has been undertaken by crystallizing them using rapid thermal annealing (RTA), but this methodology appears to be unsuitable to improve the performance of the devices due to the limited thermal stability of most TMDs.…”
Section: Effect Of the Dielectric Environmentmentioning
confidence: 99%
“…The extracted values of τ and β were 4.1 × 10 5 s, ≈0.33 under PBS and 8.2 × 10 4 s, ≈0.37 under NBS, respectively. The carrier trapping time of the ionic gating MoS 2 transistor showed a long trapping time (≈10 5 s) compared with that of the previously reported MoS 2 transistors (≈10 3 s) . High carrier trapping time implies that relatively less V th shift occurs under the same stress conditions.…”
mentioning
confidence: 60%
“…The carrier trapping time of the ionic gating MoS 2 transistor showed a long trapping time (%10 5 s) compared with that of the previously reported MoS 2 transistors (%10 3 s). [32,33] High carrier trapping time implies that relatively less V th shift occurs under the same stress conditions. The ionic gating MoS 2 transistor has a good interfacial property at the MoS 2 /IG interface with very few electron trap sites presumably because chemical defects are not generated on the pristine MoS 2 surface during IG processing using the C & S method and IG serves as a passivation for preventing the adsorption of moisture/oxygen in an ambient environment.…”
mentioning
confidence: 99%
“…[1][2][3] With its direct optical bandgap ranging from 0.3 eV in bulk to over 1 eV in the singlelayer limit, 1,4 BP is able to outperform graphene 5 in digital device applications. At the same time, the comparatively high hole mobility up to 1000 cm 2 /Vs makes BP a promising candidate as a channel material in p-FETs, 3 which would nicely complement MoS 2 n-FETs [6][7][8][9] in integrated or flexible CMOS circuits. Furthermore, the electron mobility in BP is also larger than in MoS 2 , which makes it interesting for n-FETs as well.…”
Section: Black Phosphorus (Bp) Is a Crystalline Two-dimensional (2d)mentioning
confidence: 99%