Electrical Characteristics of 8-nm SOI n-FinFETs

Temperature Dependence of Electrical Parameters of Silicon-on-Insulator Triple Gate n-Channel Fin Field Effect Transistor

“…The threshold voltage in case of a MuGFET (multiple gate fieldeffect transistor) can be expressed in the following equation [1]: (1) where Q ss represents the charge in the gate dielectric, C ox is the gate capacitance, Q D is the depletion charge in the channel, Φ ms represents the metal-semiconductor work function difference between the gate electrode and the semiconductor, and Φ f is the Fermi potential for p-type silicon that is given by the following equation: (2) where K is the Boltzmann constant, T is the temperature, q is the electron charge, N A is the acceptor concentration in the psubstrate, and n i is the intrinsic carrier concentration.…”

“…FinFET (Fin field-effect transistor) has been introduced as a novel device structure for all production companies such as TSMC, Intel, and Samsung to obtain a high performance of microprocessors beyond the barrier of 14 nm [1,2]. Compared to conventional MOSFET (metal oxide semiconductor field effect transistor), the FinFET provides a better electrical control over the channel, thus leading to significant improvements of device performance [1][2][3]. For FinFET, the body thickness T Fin should be approximately half of the gate length L G to provide better control of short channel effects.…”

“…For FinFET, the body thickness T Fin should be approximately half of the gate length L G to provide better control of short channel effects. When the L G /T FIN ratio is smaller than 1.5, the drain induced barrier lowering, subthreshold swing, and leakage current are increased sensibly [2][3][4][5][6][7][8].…”

Impact of temperature on radio frequency/linearity and harmonic distortion characteristics of Ge multi‐channel fin shaped field‐effect transistor

“…To optimize this all drawbacks of MOSFET devices concerning SCEs, 6 a new architecture is introduced called fin shaped field‐effect transistor (FinFET) 7 . A 3D multi‐gate transistor, FinFET is the one of the emerging candidate among other contemporary devices that increases the electrostatic control over a channel that reduces the SCEs, improvise the switching ratio and driving capability 8,9 . However, conventional FinFET structures are facing various unwanted problems with the scaling of device dimensions.…”

ALD Al2O3 gate dielectric on the reduction of interface trap density and the enhanced photo-electric performance of IGO TFT

“…11,12 High-k materials, such as Si 3 N 4 ($7), Al 2 O 3 ($9), MgO ($9.8), La 2 O 3 ($14), and ZrO x ($15), which increase the drain current due to their high dielectric constant values, improve the transistor device characteristics. [13][14][15][16][17][18][19] In the present study, the IGO thin lm transistor was investigated with different dielectrics. Sample A used SiO 2 as a dielectric by wet oxidation.…”