Efficient System-on-Chip Energy Management with a Segmented Bloom Filter

Ghosh, Mrinmoy; Özer, Emre; Biles, Stuart; Lee, Hsien-Hsin S.

doi:10.1007/11682127_20

Cited by 19 publications

(9 citation statements)

References 15 publications

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“…Hashtable-based alternatives similar to Bloom filters have been proven to be more space-efficient than Bloom filters themselves [6,19]. Bloom filters have been used in computer architecture for purposes other than conflict detection (e.g., for load-store queues [26] and early miss detection in L2 caches [11]). …”

Section: Related Workmentioning

confidence: 99%

Implementing Signatures for Transactional Memory

Sánchez¹,

Yen²,

Hill³

et al. 2007

40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2007)

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Transactional Memory (TM) systems must track the read and write sets-items read and written during a transaction-to detect conflicts among concurrent transactions. Several TMs use signatures, which summarize unbounded read/write sets in bounded hardware at a performance cost of false positives (conflicts detected when none exists).This paper examines different organizations to achieve hardware-efficient and accurate TM signatures. First, we find that implementing each signature with a single k-hashfunction Bloom filter (True Bloom signature) is inefficient, as it requires multi-ported SRAMs. Instead, we advocate using k single-hash-function Bloom filters in parallel (Parallel Bloom signature), using area-efficient single-ported SRAMs. Our formal analysis shows that both organizations perform equally well in theory and our simulationbased evaluation shows this to hold approximately in practice. We also show that by choosing high-quality hash functions we can achieve signature designs noticeably more accurate than the previously proposed implementations. Finally, we adapt Pagh and Rodler's cuckoo hashing to implement Cuckoo-Bloom signatures. While this representation does not support set intersection, it mitigates false positives for the common case of small read/write sets and performs like a Bloom filter for large sets.

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Section: Related Workmentioning

confidence: 99%

Implementing Signatures for Transactional Memory

Sánchez¹,

Yen²,

Hill³

et al. 2007

40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2007)

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“…This scheme requires the addition of a large decoder and a two fields per way: one segmented bloom filter, previously proposed by the same authors to filter accesses to the whole cache [8], and another bloom filter to filter accesses to ways. This may result in excessive overhead and critical complexity.…”

Section: Related Workmentioning

confidence: 99%

The Tag Filter Cache: An Energy-Efficient Approach

Valls

Sahuquillo

Ros

et al. 2015

2015 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing

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Power consumption in current high-performance chip multiprocessors (CMPs) has become a major design concern. The current trend of increasing the core count aggravates this problem. On-chip caches consume a significant fraction of the total power budget. Most of the proposed techniques to reduce the energy consumption of these memory structures are at the cost of performance, which may become unacceptable for high-performance CMPs. On-chip caches in multi-core systems are usually deployed with a high associativity degree in order to enhance performance. Even first-level caches are currently implemented with eight ways. The concurrent access to all the ways in the cache set is costly in terms of energy.In this paper we propose an energy-efficient cache design, namely the Tag Filter Cache (TF-Cache) architecture, that filters some of the set ways during cache accesses, allowing to access only a subset of them without hurting the performance. Our cache for each way stores the lowest order tag bits in an auxiliary bit array and these bits are used to filter the ways that do not match those bits in the searched block tag. Experimental results show that, on average, the TF-Cache architecture reduces the dynamic power consumption up to 74.9% and 85.9% when applied to the L1 and L2 cache, respectively, for the studied applications.

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“…The SSP technique uses stack-bit (S-bit) annotation for stack accesses and counting Bloom filters for non-stack accesses to selectively filter out snoop probes that are not needed. Recently, Bloom filters [10] have been widely used in various microarchitecture optimizations for performance and power [26,31,17,29]. A Bloom filter is a probabilistic data structure used to indicate if an element is a member of a set.…”

Section: Selective Snoop Probes (Ssp)mentioning

confidence: 99%

Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors

Ballapuram

Sharif

Lee³

2008

SIGARCH Comput. Archit. News

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Integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. Most of the current research thrusts using chip multiprocessors (CMPs) as the baseline to analyze problems in various domains. One of the main design issues facing CMP systems is the growing number of snoops required to maintain cache coherency and to support self/cross-modifying code that leads to power and performance limitations. In this paper, we analyze the internal and external snoop behavior in a CMP system and relax the snoopy cache coherence protocol based on the program semantics and properties of the shared variables for saving power. Based on the observations and analyses, we propose two novel techniques: Selective Snoop Probe (SSP) and Essential Snoop Probe (ESP) to reduce power without compromising performance. Our simulation results show that using the SSP technique, 5% to 65% data cache energy savings per core for different processor configurations can be achieved with 1% to 2% performance improvement. We also show that 5% to 82% of data cache energy per core is spent on the non-essential snoop probes that can be saved using the ESP technique.

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Efficient System-on-Chip Energy Management with a Segmented Bloom Filter

Cited by 19 publications

References 15 publications

Implementing Signatures for Transactional Memory

Implementing Signatures for Transactional Memory

The Tag Filter Cache: An Energy-Efficient Approach

Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors

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