Efficient representation and manipulation of switching functions based on ordered Kronecker functional decision diagrams

Drechsler, Rolf; Sarabi, Andisheh; Theobald, Michael; Becker, Bernd; Perkowski, M. A.

doi:10.1145/196244.196444

Cited by 149 publications

(72 citation statements)

References 18 publications

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“…In this section we present experimental results that were carried out on the OFDD package presented in [5] o n a Sparc 1 + w orkstation.…”

Section: Resultsmentioning

confidence: 99%

“…Since the algorithm in the following uses the EXOR-synthesis on OFDDs [5] as a basic operation we brie y consider its complexity.…”

Section: If G H a S A R O O T V With Labelmentioning

confidence: 99%

“…OFDDs have been introduced in [7,6]. E cient synthesis operations on OFDDs were developed and integrated in an OFDD package [5]. OFDDs together with e cient synthesis operations can be successfully applied to nd good or minimal polarities for FPRMs [6].…”

Section: Introductionmentioning

confidence: 99%

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Sympathy: fast exact minimization of fixed polarity Reed-Muller expressions for symmetric functions

Drechsler

Becker

1997

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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In this paper a polynomial time algorithm for the minimization of Fixed Polarity Reed-Muller Expressions (FPRMs) for totally symmetric functions based on Ordered F unctional Decision Diagrams (OFDDs) is presented. A generalization to partially symmetric functions is investigated. The algorithm has been implemented as the program Sympathy. Experimental results in comparison to previously published methods are given to show the e ciency of the approach.

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“…In this section we present experimental results that were carried out on the OFDD package presented in [5] o n a Sparc 1 + w orkstation.…”

Section: Resultsmentioning

confidence: 99%

“…Since the algorithm in the following uses the EXOR-synthesis on OFDDs [5] as a basic operation we brie y consider its complexity.…”

Section: If G H a S A R O O T V With Labelmentioning

confidence: 99%

See 1 more Smart Citation

Sympathy: fast exact minimization of fixed polarity Reed-Muller expressions for symmetric functions

Drechsler

Becker

1997

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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“…Examples of systems which rely on algebraic techniques are MIS [53], SOCRATES [74], and SIS [3]. In more recent years much attention has also been given to And-Xor decompositions [75,76,40,77,78].…”

Section: Global Transformation Methodsmentioning

confidence: 99%

“…However, since fanin count is the only notion of node complexity in these approaches, they do not extend easily to a library specific synthesis. A number of approaches have also been developed which explore the structure of the decision diagram representation of a given function [85,77,86,87]. The close relation between BDDs and multiplexer circuits has also lead to several approaches to synthesis of pass transistor logic (PTL) [88,89,76,90].…”

Section: Chapter 3 Logic Synthesismentioning

confidence: 99%

Integrated logic synthesis using simulated annealing

Färm

Dubrova

Kuehlmann

2011

Proceedings of the 21st Edition of the Great Lakes Symposium on Great Lakes Symposium on VLSI

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KTH School of Information andCommunication Technology SE-164 40 Kista SWEDEN Akademisk avhandling som med tillstånd av Kungl Tekniska högskolan framlägges till offentlig granskning för avläggande av teknologie doktorsexamen i elektronik fredagen den 26 januari 2007 klockan 9.00 i Sal E, Forumhuset, Kungl Tekniska högskolan, Isafjordsgatan 39, Kista. © Petra Färm, januari 2007Tryck: Universitetsservice US AB iii Abstract A conventional logic synthesis flow is composed of three separate phases: technology independent optimization, technology mapping, and technology dependent optimization. A fundamental problem with such a three-phased approach is that the global logic structure is decided during the first phase without any knowledge of the actual technology parameters considered during later phases. Although technology dependent optimization algorithms perform some limited logic restructuring, they cannot recover from fundamental mistakes made during the first phase, which often results in non-satisfiable solutions.We present a global optimization approach combining technology independent optimization steps with technology dependent objectives in an annealing-based framework. We prove that, for the presented move set and selection distribution, detailed balance is satisfied and thus the annealing process asymptotically converges to an optimal solution. Furthermore, we show that the presented approach can smoothly trade-off complex, multiple-dimensional objective functions and achieve competitive results. The combination of technology independent and technology dependent objectives is handled through dynamic weighting. Dynamic weighting reflects the sensitivity of the local graph structures with respect to the actual technology parameters such as gate sizes, delays, and power levels. The results show that, on average, the presented advanced annealing approach can improve the area and delay of circuits optimized using the Boolean optimization technique provided by SIS with 11.2% and 32.5% respectively.Furthermore, we demonstrate how the developed logic synthesis framework can be applied to two emerging technologies, chemically assembled nanotechnology and molecule cascades. New technologies are emerging because a number of physical and economic factors threaten the continued scaling of CMOS devices. Alternatives to silicon VLSI have been proposed, including techniques based on molecular electronics, quantum mechanics, and biological processes. We are hoping that our research in how to apply our developed logic synthesis framework to two of the emerging technologies might provide useful information for other designers moving in this direction.iv

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