Efficient reconfigurable entropy coder for embedded multi-standards video adaptation

Marques, Nicolas; Rabah, Hassan; Dabellani, Eric; Weber, S.

doi:10.1109/cvprw.2011.5981836

Cited by 3 publications

(1 citation statement)

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“…However, the existing works have focused on some parts of the transcoder rather than the entire transcoding chain [2], [3]. As real time video transcoding involves decoding and recoding, very strong time constraints have to be met to avoid visual degradation.…”

Section: Introductionmentioning

confidence: 99%

Modeling and FPGA implementation of reconfigurable transcoder for real time video adaptation

Dabellani

Rabah

Marques

et al. 2013

2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)

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Video adaption is one of the main solutions to offer access to the large array of existing multimedia contents and the variety of terminals and networks. This adaptation can be achieved efficiently using transcoding techniques. The implementation of the various adaptation possibilities and techniques in embedded systems such as home gateway requires flexible and efficient architectures. This paper presents a hardware reconfigurable architecture for the real time adaptation of video contents for different terminals and available bandwidth. This architecture is designed to adapt a compressed stream in advanced video coding standard (H264/AVC) and/or MPEG-2. A system level model of reconfigurable transcoder is developed for IP integration and architectural exploration by taking into account dynamic and partial reconfiguration. The developed simulation model of dynamic partial reconfiguration allowed the early estimation of performances and the design of the suitable solution for the considered transcoding scenarios.

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Section: Introductionmentioning

confidence: 99%