Efficient parallel implementation of three‐point viterbi decoding algorithm on CPU, GPU, and FPGA

Abstract

SUMMARYIn wireless communication, Viterbi decoding algorithm (VDA) is the one of most popular channel decoding algorithms, which is widely used in WLAN, WiMAX, or 3G communications. However, the throughput of Viterbi decoder is constrained by the convolutional characteristic. Recently, the three‐point VDA (TVDA) was proposed to solve this problem. In TVDA, the whole procedure can be divided into three phases, the forward, trace‐back, and decoding phases. In this paper, we analyze the parallelism of TVDA and propose parallel TVDA on the multi‐core CPU, graphics processing unit (GPU), and field programmable gate array (FPGA). We demonstrate approaches that fully exploit its performance potential on CPU, GPU, and FPGA computing platforms. For CPU platforms, we perform two optimization methods, single instruction multiple data and multithreading to gain over 145 × speedup over the naive CPU version on a quad‐core CPU platform. For GPU platforms, we propose the combination of cached memory optimization, coalesced global memory accesses, codeword packing scheme, and asynchronous data transition, achieving the throughput of 404.65 Mbps and 12 × speedup over initial GPU versions on an NVIDIA GeForce GTX580 card and 7 × speedup over Intel quad‐core CPU i5‐2300, under the same manufacturing year and both with fully optimized schemes. In addition, for FPGA platforms, we customize a radix‐4 pipelined architecture for the TVDA in a 45‐nm FPGA chip from Xilinx (XC6VLX760). Under 209.15‐MHz clock rate, it achieves a throughput of 418.30 Mbps. Finally, we also discuss the performance evaluation and efficiency comparison of different flexible architectures for real‐time Viterbi decoding in terms of the decoding throughput, power consumption, optimization schemes, programming costs, and price costs.Copyright © 2013 John Wiley & Sons, Ltd.

Comparing parallel hardware architectures for visually guided robot navigation

“…However, our results confirm that the common comparison between serial CPU implementations and GPU implementations is quite misleading (e.g., ): In such scenarios, very large speedups in favor of GPUs are achieved; however, the GPU advantage either disappears completely as soon as the full CPU capacities are utilized or at least becomes considerably smaller (speedups in the single–digit range). This is what we observe for the min‐warping algorithm as well with speedups between 2 and 8.4 in favor of GPUs compared with multi‐core‐SIMD.…”

“…There exists a considerable amount of studies in which the performance of CPU and GPU implementations is compared for specific tasks (for example, ). Even closer to our work are studies which include FPGAs or directly compare FPGAs with GPUs . The benchmarked applications are from many different fields like machine learning , neural modeling , optimization , numerical algorithms , image and video processing [16, 22, 24–27, 30], computer tomography , molecular sequencing , financial simulations , encryption and decoding , or analog circuit simulation .…”

“…However, the full capabilites of modern CPUs are often not exploited what leads to unfair comparisons. Exceptions are studies in which at least multi‐threading is applied to occupy all CPU cores , or in which both multi‐threading and vectorized code are used . In such a setting, Alachiotis et al .…”

“…Third, the number of processing elements implemented in an FPGA design is less than the number of available processing elements in current GPUs.There exists a considerable amount of studies in which the performance of CPU and GPU implementations is compared for specific tasks (for example, [3,[7][8][9][10][11][12][13][14][15]). Even closer to our work are studies which include FPGAs or directly compare FPGAs with GPUs [7,[16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31][32]. The benchmarked applications are from many different fields like machine learning [9, 10, 15], neural modeling [11], optimization [13,21], numerical algorithms [7,26], image and video processing [16,22,[24][25][26][27]30], computer tomography [20, 31], molecular sequencing [3], financial simulations [19], encryption and decoding [23,32], or analog circuit simulation [17].The contest between CPU and GPU implementations is normally won by the GPU side.…”

Decoding with Finite-State Transducers on GPUs

“…Although the use of graphics processing units (GPUs) is now de rigeur in applications of neural networks and made easy through toolkits like Theano (Theano Development Team, 2016), there has been little previous work, to our knowledge, on acceleration of weighted finite-state computations on GPUs (Narasiman et al, 2011;Li et al, 2014;Peng et al, 2016;Chong et al, 2009). In this paper, we consider the operations that are most likely to have high speed requirements: decoding using the Viterbi algorithm, and training using the forward-backward algorithm.…”