Efficient Loop Unrolling Factor Prediction Algorithm using Machine Learning Models

Singh, Inderpreet; Singh, Sunil K.; Singh, Rashandeep; Kumar, Sudhakar

doi:10.1109/incet54531.2022.9825092

Cited by 24 publications

(6 citation statements)

References 27 publications

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“…The built-in loop unrolling model in Open64 can only increase program performance by 5% on average, however the technique suggested in this research for predicting loop unrolling components using weighted decision forest can enhance program performance by 12% on average. In [1], a loop unrolling approach based on enhanced random decision forest was developed in order to increase the accuracy of the compiler's loop unrolling factor. First, they enhanced the standard random choice forest by introducing weight values.…”

Section: Literature Reviewmentioning

confidence: 99%

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Untitled

2023

Inf. Sci. Lett.

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Loop unrolling is a well-established code transformation technique that can improve the performance of a program at runtime. The key benefit of unrolling a loop is that it often requires fewer instruction executions than the original loop. However, determining the optimal number of loop unrolling is a critical concern. This paper presents a novel method for predicting the optimal unroll factor for a given program. Specifically, a dataset is constructed that includes the execution times of several programs with varying loop unroll factors. The programs are sourced from different benchmarks, such as Ploybench, Shooutout, and other programs. Similarity measures between the unseen program and the existing programs are computed, and the three most similar programs are identified. The unroll factor that led to the greatest reduction in execution time for the most similar programs is selected as the candidate for the unseen program. Experimental results demonstrate that the proposed method can enhance the performance of training programs for unroll factors of 2, 4, 6, and 8 by approximately 13%, 18%, 19%, and 21%, respectively. For the unseen programs, the speedup rate is approximately 37.7% for five programs.

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Section: Literature Reviewmentioning

confidence: 99%

“…Therefore, directing efforts towards enhancing the frequently executed portions of the code can have a substantial impact on the overall program execution time. [1,2] As a result, code optimization techniques that accelerate loop execution are essential. [3,4] One technique for improving program execution time is loop unrolling.…”

Section: Introductionmentioning

confidence: 99%

Untitled

2023

Inf. Sci. Lett.

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“…To guarantee that every variable is only assigned once, LLVM structures the IR internally by using SSA. Forms of SSA simplify a variety of important optimizations, including reducing redundancy, loop unrolling 68 Strength reduction optimization : According to compiler optimization theory, the strength can be reduced by replacing expensive operations with cheaper operations that have a lower execution cost 69 …”

Section: Proposed Architectural Frameworkmentioning

confidence: 99%

Section: Proposed Architectural Frameworkmentioning

confidence: 99%

“…Forms of SSA simplify a variety of important optimizations, including reducing redundancy, loop unrolling. 68 These features simplify program analysis. (ii) Strength reduction optimization: According to compiler optimization theory, the strength can be reduced by replacing expensive operations with cheaper operations that have a lower execution cost.…”

Section: Profiling For Identifying Hotspotsmentioning

confidence: 99%

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An efficient hardware supported and parallelization architecture for intelligent systems to overcome speculative overheads

Kumar

Singh

Aggarwal³

et al. 2022

Int J of Intelligent Sys

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In the last few decades, technology advancements have paved the way for the creation of intelligent and autonomous systems that utilize complex calculations which are both time‐consuming and central processing unit intensive. As a consequence, parallel processing systems are gaining popularity to enhance overall computer performance. Programmers should be able to efficiently utilize available hardware resources with parallelization in an ideal world. Through the automatic parallelization of sequential code, multithreading can be executed without extra supervision. However, a wide range of software dependencies prevents this from being feasible. An architectural framework for speculative parallelization along with an efficient memory analysis and computational algorithms for the code generation are proposed that can provide optimal performance. Furthermore, a suitable support of hardware design as a runtime library to the proposed architectural framework is presented which can be used to recover misspeculated results during execution to minimize speculative parallelism overhead. The implementation makes use of the Low‐Level Virtual Machine compiler infrastructure and is tested on numerous benchmarks, thus making it highly scalable in terms of programming languages and architectures. According to our experimental results, there is significant potential for speedup increase. In comparison to the overall function speedup, that is, geomean speedup of 5.2× approximately when using the proposed architecture without hardware support, the proposed architectural framework and algorithm with hardware support give an average geomean speedup of 7.0× approximately on the given benchmark which is written in C/C++.

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