Efficient Linear Millimeter-Wave Distributed Transceivers in CMOS SOI

Fang, Kelvin; Buckwalter, James F.

doi:10.1109/tmtt.2018.2875981

Cited by 23 publications

(6 citation statements)

References 37 publications

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“…Gain � IIP3 � f0 ðF − 1Þ � Pdc [257] Gain � IIP3 � fm Pdc [352] Gain � fCenter � IP1dB Pdc � ðNF − 1Þ [348] BW � OIP3 Pdc � ðF − 1Þ [348] Psat � PAE � BW Pdc [346] 20log 10…”

Section: Discussionmentioning

confidence: 99%

“…(e.g. A. Rasekh and M. Sharif Bakhtiar's work in 2019 [356]), other wideband LNAs which have narrower bandwidth than ultrawideband LNAs, also exhibit a top specific feature such as being very low in noise (NF < 3) [310,344,349,352] or of very low power (P DC < 8 mW) [326,346,347,355,366] or very linear (IPs > 20) [328,335,348,351,367], and have their own importance in RF applications. For instance, very low noise WB LNAs are suitable for non-portable sets such as naval radars in which their noise floor is a critical issue and not their power consumption.…”

Section: Discussionmentioning

confidence: 99%

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Ultrawideband LNA 1960–2019: Review

Shahrabadi

2021

IET Circuits, Devices & Syst

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To the best of the author's knowledge, several studies during 1960-2019 were carried out on wideband and ultrawideband LNAs just to render optimum LNAs for SAW-less Radio-Frequency Integrated Circuits (RFICs) but none of these works reviewed and taught the proceedings of these six decades, hence the lack of a comprehensive review is quite noticeable. This article specifically studies the challenges and solutions of designing UWB LNA by reviewing topologies and techniques such as inductive peaking, noise and distortion cancellation, g m -boosting, active inductor and notch filter. Its historical aspect illustrates when the idea of wideband LNA was born and how it changed to ultrawideband LNA, and its tutorial aspect discusses circuits and achievements to present optimum LNAs in Complementary MOS (CMOS), BiCMOS and High-Electron-Mobility Transistor (HEMT) technologies. This work describes the endeavours of engineers in reaching UWB LNA from narrowband LNA during six decades that have great importance as a chapter in understanding this topic because it teaches all topologies, techniques, circuits and related events in a historical narrative for trained readers who are not experts on this topic. | UWB LNA | In the 1960sWhere did the idea of 'transistorised wideband LNA' originate from? It seems that everything goes back to the 1960s when This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.

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Section: Discussionmentioning

confidence: 99%

Section: Discussionmentioning

confidence: 99%

Ultrawideband LNA 1960–2019: Review

Shahrabadi

2021

IET Circuits, Devices & Syst

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“…However, the high substrate-induced loss is still a critical challenge for mm-Wave circuits in bulk Si CMOS, which limits the gain and the power efficiency of the PA [6]. SOI-CMOS technology featuring high resistance silicon substrate (>1000 Ω) is one of the feasible solutions for low-loss mm-Wave circuits [10,11].…”

Section: Cpw Matching Network With Dc-blocking Capacitorsmentioning

confidence: 99%

“…The simulated S-parameters of the two types of matching networks with the DC-blocking capacitors swept from 10 pF to 1 pF are depicted in Figure 4. The capacitance range is reasonable for K-band applications [11,22]. The DC-blocking capacitor with a small size can be used for matching in the design of amplifiers.…”

Section: Cpw Matching Network With Dc-blocking Capacitorsmentioning

confidence: 99%

A 28 GHz Linear Power Amplifier Based on CPW Matching Networks with Series-Connected DC-Blocking Capacitors

Xia

Huang

et al. 2020

Electronics

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In this paper, the influence of the DC-blocking capacitors leveraged in coplanar waveguide (CPW) matching networks is studied. CPW matching networks with series-connected DC-blocking capacitors are less sensitive to capacitance and are adopted in a 28 GHz power amplifier (PA). The PA targeting fifth-generation (5G) phased array is developed in 90 nm silicon-on-insulator complementary-metal-oxide-semiconductor (SOI CMOS) technology. A stacked field-effect-transistor (FET) architecture is elected in the output stage to boost the output power and reduce the die area. The PA with a core area of 0.31 mm2 demonstrates a maximum small signal gain of 13.7 dB and a −3 dB bandwidth of 6.3 GHz (22.9–29.2 GHz). The PA achieves a measured saturated output power (Psat) of 14.4 dBm and a peak power added efficiency (PAE) of 25% for continuous wave signals. At 24/25.6/28 GHz, the PA achieves +7.87/+9.16/+10.7 dBm measured output power and 6.21%/8.11%/10.17% PAE at −25 dBc error vector magnitude(EVM) for a 250 MHz-wide 64-quadrature amplitude modulation (64-QAM). The developed linear PA provides a great potential for low-cost 5G phased array transceivers.

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“…The galloping rate of progress in global wireless communication based on which the outermost parts of the world are in contact needs high efficient transceivers by which the demand of portable devices assigned for the mass communication can be met [1][2][3][4][5]. Power amplifiers as subsystems in transceivers always have been in great interest of research [6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25] due to their influence on the efficiency and linearity of whole systems.…”

Section: Introductionmentioning

confidence: 99%

Increased Efficiency of a Current Compensating Load Modulation Based MMIC Doherty Power Amplifier Design In 0.25m GaAs pHEMT Technology

Rouhani

Rouhi

Abrishamifar

et al. 2020

Preprint

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In this work, a premise is applied to the conventional load modulation equation of Doherty power amplifier (DPA) in 0.25 m GaAs pHEMT technology to compensate output impedance of main amplifier ( Z out,main ) variation, even in low power region. Using this modified modulation leads to the DPAs power added efficiency (PAE) increase in comparison by the case in which the load modulation revision is ignored, which is also designed in this paper. Second harmonic rejection networks are also added to both designs to play their roles as to efficiency increase. By doing so, the revised load modulation based DPA has the maximum PAE of 39.6%, maximum output power ( P out ) of 31.61dBm, at 8 GHz. Simulation results of this DPA in higher harmonics indicate the designed DPA has the minimum second and third harmonics power of -51.7 dBm and -80 dBm, respectively. For the sake of linearity evaluation, it is depicted that 1dB-power gain compression has not occurred in the input power (P in ) range in which the proposed DPA works.

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Efficient Linear Millimeter-Wave Distributed Transceivers in CMOS SOI

Cited by 23 publications

References 37 publications

Ultrawideband LNA 1960–2019: Review

Ultrawideband LNA 1960–2019: Review

A 28 GHz Linear Power Amplifier Based on CPW Matching Networks with Series-Connected DC-Blocking Capacitors

Increased Efficiency of a Current Compensating Load Modulation Based MMIC Doherty Power Amplifier Design In 0.25m GaAs pHEMT Technology

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