Efficient implementation scheme of a real-time radar beamformer on a VLIW DSP processor, TMS320C66x TI DSP implementation

Bahtat, Mounir; Belkouch, Saïd; Elleaume, Philippe; Gall, Philippe

doi:10.1109/icocs.2012.6458555

Cited by 2 publications

(3 citation statements)

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“…X is the input matrix composed by the received signal values from nc sensors (x1, x2,…, xnc). Y is the output matrix that will contain the formed beams (y1, y2,…, ynb) [2].…”

Section: Beamformingmentioning

confidence: 99%

“…The signal processing chain applied to the received echo requires high-computing power to extract target information in real time [2]. A massively parallel machine with multiple processing elements that operate concurrently has been proposed in this paper to implement the totality of the signal processing chain in real-time fashion.…”

Section: Introductionmentioning

confidence: 99%

“…It provides a peak performance of 160 GFLOP for a floating point and 320 GMAC for a fixed point for only 10 watts. It has been used recently by many research communities to build high-performance and low power real-time signal processing systems [2,[5][6][7][8][9][10][11]. Additionally, SRIO is integrated in the C6678 DSP as a peripheral device.…”

Section: Introductionmentioning

confidence: 99%

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Real-time parallel implementation of Pulse-Doppler radar signal processing chain on a massively parallel machine based on multi-core DSP and Serial RapidIO interconnect

Klilou

Belkouch

Elleaume

et al. 2014

EURASIP J. Adv. Signal Process.

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Pulse-Doppler radars require high-computing power. A massively parallel machine has been developed in this paper to implement a Pulse-Doppler radar signal processing chain in real-time fashion. The proposed machine consists of two C6678 digital signal processors (DSPs), each with eight DSP cores, interconnected with Serial RapidIO (SRIO) bus. In this study, each individual core is considered as the basic processing element; hence, the proposed parallel machine contains 16 processing elements. A straightforward model has been adopted to distribute the Pulse-Doppler radar signal processing chain. This model provides low latency, but communication inefficiency limits system performance. This paper proposes several optimizations that greatly reduce the inter-processor communication in a straightforward model and improves the parallel efficiency of the system. A use case of the Pulse-Doppler radar signal processing chain has been used to illustrate and validate the concept of the proposed mapping model. Experimental results show that the parallel efficiency of the proposed parallel machine is about 90%.

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“…X is the input matrix composed by the received signal values from nc sensors (x1, x2,…, xnc). Y is the output matrix that will contain the formed beams (y1, y2,…, ynb) [2].…”

Section: Beamformingmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%