Efficient Gröbner Basis Reductions for Formal Verification of Galois Field Arithmetic Circuits

Abstract

Galois field arithmetic is a critical component in communication and security-related hardware, requiring dedicated arithmetic circuit architectures for greater performance. In many Galois field applications, such as cryptography, the datapath size in the circuits can be very large. Formal verification of such circuits is beyond the capabilities of contemporary verification techniques. This paper addresses formal verification of combinational arithmetic circuits over Galois fields of the type F 2 k using a computer-algebra/algebraic-geometry based approach.The verification problem is formulated as membership testing of a given specification polynomial in a corresponding ideal generated by the circuit constraints. Ideal membership testing requires the computation of a Gröbner basis, which is computationally very expensive. To overcome this limitation, we analyze the circuit topology and derive a term order to represent the polynomials. Subsequently, using the theory Gröbner bases over F 2 k , we show that this term order renders the set of polynomials itself a minimal Gröbner basis of this ideal. Consequently, the verification test reduces to a much simpler case of Gröbner basis reduction via polynomial division, significantly enhancing verification efficiency.To further improve our approach, we exploit the concepts presented in the F 4 algorithm for Gröbner basis, and show that our verification test can be formulated as Gaussian elimination on a matrix representation of the problem. Finally, we demonstrate the ability of our approach to verify the correctness of, and detect bugs in, up to 163-bit circuits in F 2 163 -whereas verification utilizing contemporary techniques proves infeasible.

Function Extraction from Arithmetic Bit-Level Circuits

“…Since most of the research in this area has been done in the context of property checking rather than a complete functional verification, we could not find suitable data for comparison. Some new results are available in Galois field arithmetic [21] that enjoy certain properties that make the verification significantly easier than for integer arithmetic in Z/2 n .…”

Groebner basis based formal verification of large arithmetic circuits using Gaussian elimination and cone-based polynomial extraction

“…However, applying them to integer arithmetic circuits is not straightforward as their models are over rational numbers' field. The authors of [13] have presented a computer algebra based technique to model and verify multiplier circuits over Galois fields F 2 k . They have shown how to model Galois field multipliers as a polynomial system in F 2 k .…”

“…, f s } extracted from the circuit (corresponding to ideal I) and represented using such a term order would itself constitute a Groebner basis of I. Although such a term order is derived and the very same concept is proposed in [13], it has been applied only to Galois field multipliers while in this work we are dealing with integer arithmetic circuits including integer multipliers. Note that, in our case, the variables are all Boolean, so their degrees never increase.…”

“…It should be noted that it does not have a special data structure for Groebner basis reduction in the case of arithmetic verification problems. Moreover, SINGULAR also limits the number of variables so that it can be used in the system up to 32,767 variables and therefore its usage is limited to small circuits [30].…”

Lightweight S-Box Architecture for Secure Internet of Things

“…The finite field design involves the design of the operations in varied sub fields. The isomorphism between the fields and the methods for those transformations has been explained in [31][32][33]. Reference [34] discusses the properties of affine equivalence in AES.…”