Efficient design of totally self-checking checkers for all low-cost arithmetic codes

Nikolos, D.; Paschalis, A.; Philokyprou, G.

doi:10.1109/12.2226

Cited by 39 publications

(13 citation statements)

References 15 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…Now we suppose that an error occurs in the second residue changing the result from 2 to 4 (the error is (0, 2, 0)). The erroneous result is (2,4,0), that corresponds to the integer value 14, that is not divisible by 11.…”

Section: Error Detection In Rns By Using Scaled Valuesmentioning

confidence: 99%

“…In particular, with respect to the basic arithmetic operations, self-checking adders based on residue codes [1], [2], parity codes [3], or Berger codes [4] have been proposed. With respect to basic DSP building blocks, the RRNS (Redundant Residue Number System) representation has been used in the implementation of FIR filters [5], [6], [7] allowing fault detection and correction.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A Novel Error Detection and Correction Technique for RNS Based FIR Filters

Pontarelli

Cardarilli

et al. 2008

2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems

View full text Add to dashboard Cite

In this paper a novel technique for detecting and correcting errors in the RNS representation is presented. It is based on the selection of a particular subset of the legitimate range of the RNS representation characterized by the property that each element is a multiple of a suitable integer number m. This method allows to detect and correct any single error in the modular processors of the RNS based computational unit. This subset of the legitimate range can be used to perform addition and multiplication in the RNS domain allowing the design of complex arithmetic structures like FIR filters. In the paper, the architecture of a FIR filter with error detection and correction capabilities is presented showing the advantages with respect to filters in which the error detection and correction are obtained by using the traditional RNS technique.

show abstract

Section: Error Detection In Rns By Using Scaled Valuesmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A Novel Error Detection and Correction Technique for RNS Based FIR Filters

Pontarelli

Cardarilli

et al. 2008

2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems

View full text Add to dashboard Cite

show abstract

“…Due to these facts, since adders are essential building blocks in all data processing systems, the design of arithmetic structures with online error detection and correction capabilities represents an important research topic. In the literature, a number of selfchecking adder implementations have been proposed, such as based on residue codes [3], [4], parity codes, [5], [6], [7], or Berger codes [8]. Other error detection techniques are based on recomputing with shifted [9] and/or rotated operands, as shown in [10], [11].…”

Section: Introductionmentioning

confidence: 99%

Fault localization, error correction, and graceful degradation in radix 2 signed digit-based adders

Cardarilli

Ottavi

Pontarelli

et al. 2006

IEEE Trans. Comput.

View full text Add to dashboard Cite

Abstract-In this paper, a methodology for the development of fault-tolerant adders based on the Radix 2 Signed Digit (SD) representation is presented. The use of a number representation characterized by a carry propagation confined to neighbor digits implies interesting advantages in terms of error detection, fault localization, and repair. Errors caused by faults belonging to a considered stuck-at fault set can be detected by a parity-based technique. In fact, a carry-free adder preserving the parity of the augends can be implemented allowing fault detection by using a parity checker. Regarding fault localization, the "carry-free" property of the adder ensures the confinement of the error due to a permanent fault to only few digits. The detection of the faulty digit has been obtained by using a recomputation with shifted operands method. Finally, after the fault localization, graceful degradation of the system intended as the reduction of the performances versus a correct output computation can be obtained by using two different procedures. The first one allows obtaining the correct output by recomputing the result performing two different shift operations and using the intersection of the obtained results to recover the correct output, while the second one is based on a reduced dynamic range approach, which allows us to obtain the result in only one step, but with fewer output digits.

show abstract

“…Altogether, the gate counts for the low-cost 3N code checkers are more pessimistic than in [12]. The gate count numbers for the proposed architecture are also worst case numbers.…”

Section: Comparisonmentioning

confidence: 94%

“…For the design of the low-cost 3N code checker the accumulatorbased method of [11] was chosen. According to this method the checker consists of an end-around-carry adder accumulator and a conventional low-cost 3N code checker which is assumed to be design as described in [12].…”

Section: Comparisonmentioning

confidence: 99%

Embedded Borden 2-UED Code Checkers

Tarnick¹

12th IEEE International on-Line Testing Symposium (IOLTS'06)

View full text Add to dashboard Cite

A possible method to design a Borden code checker is to map the Borden code words to words of an AN arithmetic code and to check the obtained words with an appropriate AN code checker. For t = 2 we show how this method can be modified such that a Borden code checker achieves the self-testing property under very weak conditions. It is only required that no checker input line gets a constant signal and that the Borden code words occur in a random order, making the proposed checkers very suitable for use as embedded checkers.

show abstract

Efficient design of totally self-checking checkers for all low-cost arithmetic codes

Cited by 39 publications

References 15 publications

A Novel Error Detection and Correction Technique for RNS Based FIR Filters

A Novel Error Detection and Correction Technique for RNS Based FIR Filters

Fault localization, error correction, and graceful degradation in radix 2 signed digit-based adders

Embedded Borden 2-UED Code Checkers

Contact Info

Product

Resources

About