Efficient BISR Techniques for Embedded Memories Considering Cluster Faults

Robust Fault Tolerance in Content Addressable Memory Interface

“…In [5], Wey and Lombardi presented a branch-and-bound techniquewith early screening in the repair process. The least number of required spares can be modeled by a bipartite graph.In [6] and [7], BISR techniques for embedded memories containing random defects and cluster faults are proposed, respectively. Instead of the traditional spare row (SR)/sparecolumn (SC) redundancy mechanisms, block-based replacement techniques are used.…”

High-yield performance-efficient redundancy analysis for 2D memory

“…However, full spare rows and columns are obviously no longer efficient for repairing clustered faulty cells and scattered faulty cells due to address faults [8]. Therefore, some infrastructures for remapping are proposed to split into shorter segments [9,10] and/or spare blocks [11]. The authors in [9] propose a line-cutting approach to elevate the repair rate.…”

“…The authors in [9] propose a line-cutting approach to elevate the repair rate. Their algorithms are either exhaustive or inefficient and the physical implementation was not presented until the authors in [10] employ the line-dividing techniques. In [10] an approach to improve the repair rate by dividing the WLs and/or BLs is proposed.…”

“…Their algorithms are either exhaustive or inefficient and the physical implementation was not presented until the authors in [10] employ the line-dividing techniques. In [10] an approach to improve the repair rate by dividing the WLs and/or BLs is proposed. However, the inserted gates for dividing the WLs and/or BLs will seriously impact on the performance of the memory during access.…”

“…However, the boundaries of variable blocks need a more complicate magnitude-comparator-based content addressable memory (CAM) with a time-consuming algorithm and impractical access time penalty due to remapping. Additionally, both the above approaches in [9][10][11] can improve the repair rates for short faulty lines due to cluster faults but the remapping architectures are not efficient and the address faults with a scattered pattern in a 2D array are not considered.…”