Efficient behavioral intellectual properties source code obfuscation for high-level synthesis

Veeranna, Nandeesha; Schäfer, Benjamin Carrión

doi:10.1109/latw.2017.7906738

Cited by 11 publications

(4 citation statements)

References 5 publications

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“…To achieve this, we rely on key-based obfuscation techniques. However, the methods presented in [11] are compatible with our approach, which means that both can be jointly used to increase the level of protection.…”

Section: A Ip Protectionmentioning

confidence: 89%

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Transient Key-based Obfuscation for HLS in an Untrusted Cloud Environment

Badier

Lann

Coussy

et al. 2019

2019 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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Section: A Ip Protectionmentioning

confidence: 89%

“…In [11], a heuristic approach for optimal obfuscation of behavioral IPs is presented. It is based on a study of the impact of commercial or free software obfuscators on HLS quality of results.…”

Section: A Ip Protectionmentioning

confidence: 99%

Transient Key-based Obfuscation for HLS in an Untrusted Cloud Environment

Badier

Lann

Coussy

et al. 2019

2019 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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“…While logic locking has been mostly applied at the gate level [11], there is a growing interest for raising the abstraction level to RTL or even more the previous stages. In these cases, this process is usually called behavioral locking and can be applied to the high-level specification (e.g., C/C++) [12], [13], during the HLS (even though it may require tool changes) [14], [15], or on the RTL descriptions [16]. In all cases, it is possible to protect more semantic information (e.g., proprietary constants, arithmetic operations, control flow) and use industrial EDA flows for chip design [17].…”

Section: B Locking Lockingmentioning

confidence: 99%

High-Level Methods for Hardware IP Protections: Solutions, Trends, and Challenges

Pilato

2022

2022 IEEE 15th Dallas Circuit and System Conference (DCAS)

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Due to the globalization of the semiconductor supply chain, the security threats for the production of an integrated circuit (IC) and its intellectual property (IP) are becoming more and more critical for many fab-less design houses. Conversely, the protections for these threats are expensive, especially when introduced in the last stages of the design flow. In this paper, we discuss the approaches, the trends, and the associated challenges that can be applied in the early stages of the design, i.e., before logic synthesis. On one hand, these approaches can operate on more semantic information and offer more protection. On the other hand, they have more effects on the overall design and need to somehow "predict" the effects on the final implementation.

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“…Also, the impact of optimization passes is application dependent. Software obfuscation techniques applied to source code can negatively affect HLS quality of results [15].…”

Section: Introductionmentioning

confidence: 99%

Opportunistic IP Birthmarking using Side Effects of Code Transformations on High-Level Synthesis

Badier

Pilato

Lann

et al. 2021

2021 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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The increasing design and manufacturing costs are leading to globalize the semiconductor supply chain. However, a malicious attacker can resell a stolen Intellectual Property (IP) core, demanding methods to identify a relationship between a given IP and a potentially fraudulent copy.We propose a method to protect IP cores created with highlevel synthesis (HLS): our method inserts a discrete birthmark in the HLS-generated designs that uses only intrinsic characteristics of the final RTL. The core of our process leverages the side effects of HLS due to specific source-code manipulations, although the method is HLS-tool agnostic. We propose two independent validation metrics, showing that our solution introduces minimal resource and delay overheads (< 6% and < 2%, respectively) and the accuracy in detecting illegal copies is above 96%.

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Efficient behavioral intellectual properties source code obfuscation for high-level synthesis

Cited by 11 publications

References 5 publications

Transient Key-based Obfuscation for HLS in an Untrusted Cloud Environment

Transient Key-based Obfuscation for HLS in an Untrusted Cloud Environment

High-Level Methods for Hardware IP Protections: Solutions, Trends, and Challenges

Opportunistic IP Birthmarking using Side Effects of Code Transformations on High-Level Synthesis

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