Efficient and side-channel-aware implementations of elliptic curve cryptosystems over prime fields

Karakoyunlu, Deniz; Gürkaynak, Frank K.; Sunar, Berk; Leblebici, Yusuf

doi:10.1049/iet-ifs.2009.0038

Cited by 22 publications

(3 citation statements)

References 47 publications

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“…Repetitive plans, for example, convey spare math (CSA) [1], [2], excess marked digits (RSDs) [3], or deposit number frameworks (RNSs) [4], [5], have been used in different outlines. Convey rationale or inserted computerized flag preparing (DSP) hinders inside field programmable entryway exhibits (FPGAs) are additionally used in a few outlines to address the convey spread issue " [6], [7].…”

Section: Introductionmentioning

confidence: 99%

VLSI design for efficient RSD-Based ECC processor using Karatsuba algorithm

Swetha¹,

Sonti²,

Murali³

2017

IJET

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In this paper, an exportable application-particular direction set elliptic bend cryptography processor in view of repetitive marked digit portrayal is proposed. The processor utilizes broad pipelining strategies for Karatsuba-Of man strategy to accomplish high throughput augmentation. Moreover, an effective particular viper without correlation and a high throughput measured divider, which brings about a short data path for expanded recurrence, are actualized. The proposed design of this paper investigation the rationale size, region and power utilization utilizing Xilinx 13.2. The expansion for the task is Vedic Sutra -Nikhilam Sutra.

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Section: Introductionmentioning

confidence: 99%

VLSI design for efficient RSD-Based ECC processor using Karatsuba algorithm

Swetha¹,

Sonti²,

Murali³

2017

IJET

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“…Higher-radix Montgomery multiplier implementations have been reported in [12], [13], [14] (radix-4), [15], [16] (radix-8), [17], [18], [19] (radix-16), [20] (radix-32), [21] (radix-64), and [22] (radix-256). Higher-radix multipliers typically result in faster multiplications, but also require more area than radix-2 multipliers.…”

Section: Introductionmentioning

confidence: 99%

Pipelined modular multiplier supporting multiple standard prime fields

Alrimeih

Rakhmatov

2014

2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors

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Computationally-intensive cryptographic applications are critically dependent on the efficiency of modular multiplications. It is desirable for a modular multiplier to offer not only high performance, but also a certain degree of flexibility, supporting multiplications over finite fields of varying size. We propose a fast and flexible modular multiplier over five prime fields GF (p), standardized by NIST for use in elliptic curve cryptography, where the five special primes p are of size 192, 224, 256, 384, and 521 bits. A prime-specific datapath configuration of our multiplier is established automatically, based on an external control word that identifies a NIST prime in use. The pipeline latency of our multiplier (implemented on a Virtex-6 FPGA and running at 100 MHz) is 80 ns for 192-bit, 224-bit, and 256-bit NIST primes, and 200 ns for 384-bit and 521-bit NIST primes. The main limitation of this work is that our multiplier currently supports only the NIST prime fields. We believe that such a limitation is justifiable, as the NIST prime fields are widely used in practice and enable performance improvements through specialized hardware optimizations.

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“…However, when dealing with actual hardware implementations of cryptosystems based on these curves, the literature only provides works that targeted digital design of custom processors [10]. Conversely, this research aims at discussing and analyzing implementations that targets standard low-resources processors for embedded systems.…”

Section: Introductionmentioning

confidence: 99%

Embedded implementation of Edwards curve- and extended Jacobi quartic curve-based cryptosystems

Peretti

Gastaldo

Stramezzi

et al. 2013

8th International Conference for Internet Technology and Secured Transactions (ICITST-2013)

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This research addresses the computationallyeffective implementation of cryptographic protocols based on elliptic curves, and targets in particular cryptosystems that should be hosted on embedded programmable processors. In principle, the implementation of Elliptic Curve Cryptography\ud (ECC) requires one to deal with different design options, which stem from the available degrees of freedom: elliptic curve family, coordinate system, and point multiplication procedure. On the other hand, theoretical studies already proved that exist only a few setups leading to computational efficient implementations. The goal of present paper is to analyze from an applicative point of view such setups, which mainly involve two specific\ud families of elliptic curves: Edwards curves and extend Jacobi quartic curves. The presented experimental session shows a few interesting outcomes; first, ECC schemes implemented by using either Edwards curves or extended Jacobi quartic curves can obtain remarkable performances in terms of computational efficiency also on low-cost, low-resources processors. Second, the experiments showed that in some cases the number of Fp operations is not enough to accurately estimate the overall performance of an ECC-based cryptosystem

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Efficient and side-channel-aware implementations of elliptic curve cryptosystems over prime fields

Cited by 22 publications

References 47 publications

VLSI design for efficient RSD-Based ECC processor using Karatsuba algorithm

VLSI design for efficient RSD-Based ECC processor using Karatsuba algorithm

Pipelined modular multiplier supporting multiple standard prime fields

Embedded implementation of Edwards curve- and extended Jacobi quartic curve-based cryptosystems

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