2019
DOI: 10.3762/bjnano.10.34
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Effects of post-lithography cleaning on the yield and performance of CVD graphene-based devices

Abstract: The large-scale production of high-quality and clean graphene devices, aiming at technological applications, has been a great challenge over the last decade. This is due to the high affinity of graphene with polymers that are usually applied in standard lithography processes and that, inevitably, modify the electrical proprieties of graphene. By Raman spectroscopy and electrical-transport investigations, we correlate the room-temperature carrier mobility of graphene devices with the size of well-ordered domain… Show more

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Cited by 7 publications
(4 citation statements)
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“…30 Chemical cleaning of polymer residues from graphene is sometimes done using strong solvents such as N -methyl-2-pyrrolidone (NMP), but they can induce lattice defects or delamination of graphene from the substrate. 33…”
Section: Introductionmentioning
confidence: 99%
“…30 Chemical cleaning of polymer residues from graphene is sometimes done using strong solvents such as N -methyl-2-pyrrolidone (NMP), but they can induce lattice defects or delamination of graphene from the substrate. 33…”
Section: Introductionmentioning
confidence: 99%
“…Moreover, this modification process usually results in increased graphene resistance when DMF is used as the diluting medium for PBSE [39,40]. We attribute this in part to structural disorder introduced in graphene upon exposure to DMF, leading to a higher density of lattice defects and reduced charge carrier transport [33]. The subsequent immobilization of SARS-CoV-2 spike antibodies on graphene produced an additional positive shift of the graphene transfer curve, as shown in figure 2(b), indicating further p-doping.…”
Section: Resultsmentioning
confidence: 99%
“…The devices were fabricated using single-layer graphene grown by chemical vapor deposition (CVD) and transferred to Si/SiO 2 substrates, obtained from Graphene Platform Corp. GFET devices were produced using standard photolithography and O 2 plasma etching to define the sensing region dimensions (100 µm × 100 µm) [33,34]. The source and drain electrodes were fabricated by electron-beam evaporation of Ti/Au.…”
Section: Fabrication Of Devicesmentioning
confidence: 99%
“…We carried out the electrical characterization utilizing field-effect transistors fabricated using single-layer graphene grown by chemical vapor deposition (CVD) and transferred to Si/SiO 2 substrates. The wafers were purchased from Graphene Platform and we produced graphene transistors by conventional photolithography, following the procedures previously described by our group elsewhere [ 24 ]. The dimensions of the sensing region (100 μm × 100 μm) were defined by O 2 plasma etching.…”
Section: Methodsmentioning
confidence: 99%