Effects of post-annealing on the passivation interface characteristics of AlGaN/GaN high electron mobility transistors

Yoon, Yup; Park, Kyoung-Seok; Kim, Sam-Dong

doi:10.1016/j.mssp.2015.02.062

Cited by 4 publications

(4 citation statements)

References 16 publications

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“…Thus, the Vth can be positively shifted. Compared to other research [11]- [17], [27], [28], this study can achieve significant improvement using short-time PMA. It is speculated that the low-damage NBE does not generate bond-breaking on the substrate surface caused by UV/VUV irradiations.…”

Section: Resultsmentioning

confidence: 67%

“…Kim et al proposed gate leakage and breakdown mechanisms before and after PMA [11]; Lee et al demonstrated improved device uniformity and breakdown voltage after PMA by reducing the trapping centers on the AlGaN surface and/or GaN buffer layer [12]; Mazumder et al investigated the mechanisms of the reduction of gate leakage in AlGaN/GaN MOS-HEMTs by optimizing the post-gate annealing treatment [13]; Lu et al reported a two-step process combining PMA and O2 plasma treatment reduced the device off-state leakage current [14]. However, most research on improving device characteristics requires a long-time (>10 min) annealing, or focuses solely on D-mode devices [15]- [17]. This study employed significantly shorter PMA treatment times times, which led to notable improvements in the DC characteristics.…”

Section: Introductionmentioning

confidence: 99%

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Enhancing the Performance of E-Mode AlGaN/GaN HEMTs With Recessed Gates Through Low-Damage Neutral Beam Etching and Post-Metallization Annealing

Chen,

Ohori,

Aslam

et al. 2023

IEEE Open J. Nanotechnol.

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This study investigated the electrical properties of AlGaN/GaN high-electron-mobility transistors (HEMTs) with varied recess depths under the gate electrode. We demonstrated a recess depth of approximately 6 nm, which was achieved through neutral beam etching (NBE) technique with a low etch rate of 1.8nm/min, resulting in device enhancement-mode (E-mode) behavior with threshold voltage (Vth) of 0.49 V. The effects of post-metallization annealing (PMA) on the device performance were also examined. The results revealed that PMA treatment improves the DC characteristics of the devices, including maximum drain current (IDMAX), transconductance (gm), subthreshold swing (SS), onoff ratio, and off-state leakage current, with maximum enhancement percentage of 18.3% for IDMAX, 3758% for on-off ratio, and 54.3% for SS. Moreover, this study compared the recess depths of metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) with the SiN dielectric layer. The results showed that MIS-HEMTs exhibit more negative Vth values, which can be attributed to the controlled surface states achieved through passivation.

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Section: Resultsmentioning

confidence: 67%

Section: Introductionmentioning

confidence: 99%

Enhancing the Performance of E-Mode AlGaN/GaN HEMTs With Recessed Gates Through Low-Damage Neutral Beam Etching and Post-Metallization Annealing

Chen,

Ohori,

Aslam

et al. 2023

IEEE Open J. Nanotechnol.

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“…Alternative high-k candidates like HfO 2 , TiO 2 , Ta 2 O 5 , ZrO 2 and Al 2 O 3 have been widely reported [1]- [5] as a replacement of conventional SiO 2 gate dielectrics so as to maximize the gate capacitance and minimize the gate leakage current for low power applications. Meanwhile, in order to improve device reliability performance, different PMA methods of MOS transistors have been under considerably wide study [6]- [10] using gases like H 2 , O 2 , NH 3 , N 2 , N 2 O, CO 2 , with or without noble gases, etc. Conventionally, a PECVD (Plasma Enhanced Chemical Vapor Deposition) SiO 2 and/or Si 3 N 4 passivation dielectric layer can significantly alleviate the free surface states for current collapse and electron trapping effects [10]- [12] .…”

Section: Introductionmentioning

confidence: 99%

“…Meanwhile, in order to improve device reliability performance, different PMA methods of MOS transistors have been under considerably wide study [6]- [10] using gases like H 2 , O 2 , NH 3 , N 2 , N 2 O, CO 2 , with or without noble gases, etc. Conventionally, a PECVD (Plasma Enhanced Chemical Vapor Deposition) SiO 2 and/or Si 3 N 4 passivation dielectric layer can significantly alleviate the free surface states for current collapse and electron trapping effects [10]- [12] .…”

Section: Introductionmentioning

confidence: 99%

PMA effects on Al/HfO2 high-K PMOS capacitors

Xiao

Deng

et al. 2016

2016 China Semiconductor Technology International Conference (CSTIC)

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A two-step post-metallization annealing (PMA) process has been developed and it has demonstrated its significant benefit for high-k metal gate (HKMG) in reducing post chemical mechanical polish (CMP) Al corrosion defects.After metal gate CMP, samples are firstly treated with N 2 O plasma in a 400°C PECVD (plasma enhanced chemical vapor deposition) chamber for surface oxidization, before which the chamber has been cycled with pumping through N 2 and noble gas mixture so as to remove moisture and/or particles on chamber wall. Then, N 2 O gas switched off and NH 3 /N 2 mixture plasma turned on to nitridize the metal oxides. A multi-variable (e.g. Gas ratio, RF power, plasma treatment time, chamber pressure, etc.) statistical design of experiment (DOE) was performed to optimize processes for growing ultra-thin metal oxynitride (e.g. AlON, TiON, TaON, etc.) on top surface of the metal gate, which will work as the 2 nd etch stop layer (ESL) as well. TEM results showed that metal has been dragged upwards desirably and 30~60Å self-aligned insulated film grown upon Al/ HfO 2 capacitor, but 50~100Å diffusing layer was also observed unavoidably, which may induce metal loss and lead to a higher electrical resistance.With PMA treatment, PMOS post-CMP corrosion defects have been reduced significantly by ~85% in isolated SRAM (Static Random Access Memory), by ~50% in dense area, and by ~75% at the gate boundary area. The correlation of I OFF v.s I DSAT and I DSAT v.s V DSAT (saturation voltage at sub-threshold regime) demonstrated a comparable performance with that of non-PMA process.In light of the findings from this study, a trade-off between defect reduction and N/O atom diffusion downward metal gate should achieve with further PMA optimization.

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