In this paper we present an integral physical model for describing electrical
and dielectric properties of MOS structures containing dielectric stack
composed of a high-k dielectric (with emphasize on pure and doped Ta2O5) and
an interfacial silicon dioxide or silicon oxynitride layer. Based on the
model, an equivalent circuit of the structure is proposed. Validity of the
model was demonstrated for structures containing different metal gates (Al,
Au, Pt, W, TiN, Mo) and different Ta2O5 based high-k dielectrics, grown of
bare or nitrided silicon substrates. The model describes very well the I-V
characteristics of the considered structures, as well as frequency dependence
of the capacitance in accumulation. Stress-induced leakage currents are also
effectively analyzed by the use of the model.