Effective Schottky barrier lowering in silicon-on-insulator Schottky-barrier metal-oxide-semiconductor field-effect transistors using dopant segregation

Abstract

We present an investigation of the use of dopant segregation in Schottky-barrier metal-oxide-semiconductor field-effect transistors on silicon-on-insulator. Experimental results on devices with fully nickel silicided source and drain contacts show that arsenic segregation during silicidation leads to strongly improved device characteristics due to a strong conduction/valence band bending at the contact interface induced by a very thin, highly doped silicon layer formed during the silicidation. With simulations, we study the effect of varying silicon-on-insulator and gate oxide thicknesses on the performance of Schottky-barrier devices with dopant segregation. It is shown that due to the improved electrostatic gate control, a combination of both ultrathin silicon bodies and gate oxides with dopant segregation yields even further improved device characteristics greatly relaxing the need for low Schottky barrier materials in order to realize high-performance Schottky-barrier transistors.

Physics of ultrathin-body silicon-on-insulator Schottky-barrier field-effect transistors

“…This means that the device behaves like a "bulk-switching", conventional MOSFET, where thermionic emission of carriers over the source bulk potential barrier in the channel is responsible for the current flow instead of tunneling through a SB. The reason for this is a strongly decreased effective SB height due to the highly doped area at the silicide-silicon interface [22]. The highly doped layer leads to a strong band bending at the interface.…”

Experimental and simulation study of the Schottky barrier lowering by substrate doping variation for PtSi Source/Drain SBFETs

“…by inserting a thin insulator layer [3] or by creating a highly doped region located at the silicide/Si interface with a dopant segregation technique [5]- [6]. To our knowledge, no such reports were available for hole SBH modulation.…”

Schottky barrier modulation on silicon nanowires

“…I DS vs V GS was measured from room temperature up to 90°C for V DS =−5 V. Figure 2 shows drain current I DS as a function of the gate voltage V GS for a drain voltage V DS of −5 V and for different temperatures in the range of 303-363 K. Two distinct kinks are observed among the graphs, dividing the coordinate plane into three regimes, A, B, and C, in a similar manner as found in planar Schottky barrier metal-oxide-semiconductor field effect transistors. 11 For negative V GS values in regime A, where the energy bands in the channel between the source and drain contacts tend to be bended to higher electron energies, hole injection from source is favored. In regime B, the energy bands in the channel are pressed down by V GS in relation to the drain contact.…”