Effect of thin gate dielectrics on DC, radio frequency and linearity characteristics of lattice‐matched AlInN/AlN/GaN metal–oxide–semiconductor high electron mobility transistor

Abstract

In this paper, the authors present a polarisation dependent analytical model for DC, radio frequency (RF) and linearity characteristics of a proposed lattice-matched AlInN/AlN/GaN metal-oxide-semiconductor high electron mobility transistor (MOSHEMT). The developed model includes charge controlled analysis derived from triangular potential well approximation along with the spontaneous and piezoelectric polarisation effects. The model accurately predicts the threshold voltage, two-dimensional electron gas sheet charge density, drain current, transconductance and cutoff frequencies for different samples of gate dielectric materials such as SiO 2 ,H f O 2 and Al 2 O 3 over a full range of gate and drain bias. A detailed analysis of the linearity characteristics by investigating the key figure-of-merit metrics such as second-order voltage intercept point, third-order voltage intercept point, third-order input intercept point and third-order intermodulation distortion are performed for different gate dielectric thicknesses of 5, 7 and 10 nm. The accuracy of the model results is verified against Silvaco Technology Computer Aided Design numerical simulation results and found to be satisfactory. It is observed that by careful tuning the device parameters such as dielectric constant and dielectric thickness, lattice-matched AlInN/AlN/GaN MOSHEMT can considerably improve the device performance and suitable for high performance low distortion RF applications.

Effects of Varying the Fin Width, Fin Height, Gate Dielectric Material, and Gate Length on the DC and RF Performance of a 14-nm SOI FinFET Structure

“…The structure of the fin field-effect transistor (FinFET) has completely emerged as a promising design solution for CMOS logic and memory circuit design because of its good immunity to short channel effects (SCEs) [1][2][3]. This technology enables the creation of high-performance ultra-scaled, high-density integration, and high-performance silicon (Si) chips [1][2][3][4]. In the silicon industry, device miniaturization is still considered a key feature to achieve better short-channel performance.…”

“…In the silicon industry, device miniaturization is still considered a key feature to achieve better short-channel performance. Currently, a great effort concerns the development of FinFET devices with dimensions below 5 nm that represent the target in the near future [4][5][6][7][8]. Despite the effort made to create devices with dimensions below 5 nm, many aspects still remain to be clarified and optimized, also with a view to a larger-scale application of the devices.…”

High Sensitive pH Sensor Based on AlInN/GaN Heterostructure Transistor

“…The GaN-based heterostructure hosts a two-dimensional gas (2DEG) channel with high sheet carrier concentration and high electron mobility, a wide band gap, high carrier velocity saturation and good chemical stability [1,2,3,4,5]. On the other hand, gallium nitride material devices can be operated at high temperatures up to 500 °C owing to its wide band gap (3.4 eV for GaN versus 1.1 eV for Si) [6], enabling good performance in spacecraft, satellite radar or other electronic equipment working in high temperature environments without using additional cooling segment, therefore simplifying the complexity of the integrated circuit, reducing spacecraft launch weights and increasing satellite functional capabilities.…”

Effects of dissipative substrate on the performances of enhancement mode AlInN/GaN HEMTs

“…GaN‐based high electron mobility transistors (HEMTs) have demonstrated excellent performance in applications such as power devices, photo detectors, sensors, and radiofrequency devices because of their advantages such as a wide band gap, large critical electric field, and high‐density 2‐dimensional electron gas (2DEG) . The stress at the Al 1‐ x In x N/GaN interface can be avoided at x = 0.17 because of lattice matching, generating a lower density of defects and trapping centers at the surface and the interface of the heterostructure.…”